Thread (58 messages) 58 messages, 4 authors, 2009-10-05

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: 2009-10-03 10:57:42

On Sat, 2009-10-03 at 11:24 +0200, Joakim Tjernlund wrote:
So yes, there is a missing _tlbil_va() missing for 8xx somewhere
but there is something more too.
Maybe your new filter functions and my
 powerpc, 8xx: DTLB Error must check for more errors.
will do the trick?
Well, if we can't tell between a load and a store on a TLB miss, then
we should probably let it create an unpopulated entry in all cases,
so that we do take a proper DSI/ISI the second time around, which
would then tell us where we come from...

Ben.
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