Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite
From: Joakim Tjernlund <hidden>
Date: 2009-09-30 10:01:41
From: Joakim Tjernlund <hidden>
Date: 2009-09-30 10:01:41
Rex Feany [off-list ref] wrote on 30/09/2009 11:00:02:
Thus spake Joakim Tjernlund (joakim.tjernlund@transmode.se):quoted
quoted
Ok, I have made some minor tweaks and added debug code in do_page_fault(). Would be great if you could try on both .31 and top of tree. JockeOOPS, found a bug. Use this one instead:.31 - no change, it worked before your patch and it works after. None of your debugging printks show up. I tried removing the tlbil_va() from do_dcache_icache_coherency() and userspace goes back to be being slow/non functional. top of tree - userspace is slow and unstable, random segfaults, and none of your debugging printks show up :(
OK, something strange is going on. I am starting to suspect that there is some other problem here. If my patch is any good you should be able to use dcbx insn in copy_tofrom_user(). You could try changing all CONFIG_8xx to CONFIG_8xx_deleted arch/powerpc/lib/copy_32.S and see if that works and if you see any debug prints. Jocke