Re: [PATCH v6 2/4] net: phy: Add 5GBASER interface mode
From: Marek Behun <hidden>
Date: 2020-10-29 07:35:19
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On Thu, 29 Oct 2020 15:42:00 +1000 Pavana Sharma [off-list ref] wrote:
Add new mode supported by MV88E6393 family.
This commit message isn't ideal. It infers that the Amethyst is first such device to implement this mode, which is not true. The 5gbase-r mode is supported by various other hardware, for example Marvell's 88X3310 PHY. Just say: Add 5gbase-r PHY interface mode.
PHY_INTERFACE_MODE_2500BASEX, PHY_INTERFACE_MODE_RXAUI, PHY_INTERFACE_MODE_XAUI, + PHY_INTERFACE_MODE_5GBASER, /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */ PHY_INTERFACE_MODE_10GBASER, PHY_INTERFACE_MODE_USXGMII,
The position is IMO out of order. RXAUI and XAUI are both 10G modes, so 5gbase-r should be between 2500base-x and rxaui.
quoted hunk ↗ jump to hunk
@@ -187,6 +188,8 @@ static inline const char *phy_modes(phy_interface_t interface) return "rxaui"; case PHY_INTERFACE_MODE_XAUI: return "xaui"; + case PHY_INTERFACE_MODE_5GBASER: + return "5gbase-r"; case PHY_INTERFACE_MODE_10GBASER: return "10gbase-r"; case PHY_INTERFACE_MODE_USXGMII:
Here as well.