Re: [PATCH V3 1/5] powerpc/fsl-pci: Unify pci/pcie initialization code

On Jul 26, 2012, at 7:30 AM, Jia Hongtao wrote:

We unified the Freescale pci/pcie initialization by changing the =

fsl_pci

to a platform driver. In previous PCI code architecture the =

initialization

routine is called at board_setup_arch stage. Now the initialization is =

done

in probe function which is architectural better. Also It's convenient =

for

adding PM support for PCI controller in later patch.
=20
One issue introduced by this architecture is the timing of =

swiotlb_init.

During PCI initialization the need of swiotlb is determined and this =

should

be done before swiotlb_init. So a new function to determine swiotlb by
parsing pci ranges is made. This function is called at =

board_setup_arch

stage which is earlier than swiotlb_init.
=20
Signed-off-by: Jia Hongtao <redacted>
Signed-off-by: Li Yang <redacted>
---
Changed for V3:
- Rebase the patch set on the latest tree
- merge PCI unify and swiotlb patch into one
=20
arch/powerpc/sysdev/fsl_pci.c |  155 =

++++++++++++++++++++++++++++++++---------

arch/powerpc/sysdev/fsl_pci.h |    9 +--
2 files changed, 125 insertions(+), 39 deletions(-)

I'd like the SWIOTLB refactoring as a separate patch.  Additionally, the =
order of patches should be as follows:

1. refactor PCI node parsing code
2. add pci_determine_swiotlb (should rename to =
fsl_pci_determine_swiotlb)
3. Determine primary bus by looking for ISA node
4. convert all boards over to fsl_pci_init
5. convert fsl pci to platform driver (edac and other fixes should be =
merged in here)
6. PM support

- k=