On Mon, Oct 30, 2023 at 12:41:23AM +0200, Cristian Ciocaltea wrote:
On 10/29/23 20:45, Andrew Lunn wrote:
quoted
On Sun, Oct 29, 2023 at 06:27:11AM +0200, Cristian Ciocaltea wrote:
quoted
The StarFive VisionFive V1 SBC has a Motorcomm YT8521 PHY supporting
RGMII-ID, but requires manual adjustment of the RX internal delay to
work properly.
The default RX delay provided by the driver is 1.95 ns, which proves to
be too high. Applying a 50% reduction seems to mitigate the issue.
I'm not so happy this cannot be explained. You are potentially heading
into horrible backwards compatibility problems with old DT blobs and
new kernels once this is explained and fixed.
It seems the visionfive-v2 board also required setting some delays, but
unfortunately no details were provided:
0104340a67b1 ("riscv: dts: starfive: visionfive 2: Add configuration of
mac and phy")
That board also uses a YT8531 PHY. Its possible this is somehow to do
with the PHY. Which is why testing with the Microchip PHY is
important. That should answer the question is it a SoC or a PHY
problem.
Andrew