Re: [PATCH v2 13/23] arm64: dts: mt8192: Add mmc device nodes
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: 2022-02-18 12:56:38
Also in:
linux-devicetree, linux-mediatek, lkml
Il 18/02/22 10:16, Allen-KH Cheng ha scritto:
quoted hunk ↗ jump to hunk
Add mmc nodes for mt8192 SoC. Signed-off-by: Allen-KH Cheng <redacted> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 36 +++++++++++++++++++++--- 1 file changed, 32 insertions(+), 4 deletions(-)diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 094805db395b..cfc2db501108 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi@@ -1154,10 +1154,38 @@ #clock-cells = <1>; }; - msdc: clock-controller@11f60000 { - compatible = "mediatek,mt8192-msdc"; - reg = <0 0x11f60000 0 0x1000>; - #clock-cells = <1>; + mmc0: mmc@11f60000 { + compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc"; + reg = <0 0x11f60000 0 0x1000>, + <0 0x11f50000 0 0x1000>;
This fits on a single line: reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
+ interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>,
+ <&msdc_top CLK_MSDC_TOP_H_MST_0P>,
+ <&msdc_top CLK_MSDC_TOP_SRC_0P>,
+ <&msdc_top CLK_MSDC_TOP_P_CFG>,
+ <&msdc_top CLK_MSDC_TOP_AXI>,
+ <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>,
+ <&msdc_top CLK_MSDC_TOP_P_MSDC0>;
+ clock-names = "source", "hclk", "source_cg", "sys_cg",
+ "axi_cg", "ahb_cg", "pclk_cg";
+ status = "disabled";
+ };
+
+ mmc1: mmc@11f70000 {
+ compatible = "mediatek,mt8192-mmc", "mediatek,mt8183-mmc";
+ reg = <0 0x11f70000 0 0x1000>,
+ <0 0x11c70000 0 0x1000>;Same here.
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>,
+ <&msdc_top CLK_MSDC_TOP_H_MST_1P>,
+ <&msdc_top CLK_MSDC_TOP_SRC_1P>,
+ <&msdc_top CLK_MSDC_TOP_P_CFG>,
+ <&msdc_top CLK_MSDC_TOP_AXI>,
+ <&msdc_top CLK_MSDC_TOP_AHB2AXI_BRG_AXI>,
+ <&msdc_top CLK_MSDC_TOP_P_MSDC1>;
+ clock-names = "source", "hclk", "source_cg", "sys_cg",
+ "axi_cg", "ahb_cg", "pclk_cg";
+ status = "disabled";
};
mfgcfg: clock-controller@13fbf000 {_______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel