Thread (92 messages) 92 messages, 4 authors, 2022-02-25
STALE1578d
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[PATCH v2 04/23] arm64: dts: mt8192: Add gce node

From: Allen-KH Cheng <hidden>
Date: 2022-02-18 09:17:01
Also in: linux-devicetree, linux-mediatek, lkml
Subsystem: arm/mediatek soc support, the rest · Maintainers: Matthias Brugger, AngeloGioacchino Del Regno, Linus Torvalds

Add gce node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <redacted>
---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 8635c8a53472..f92d8d7afa5d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -6,6 +6,7 @@
 
 /dts-v1/;
 #include <dt-bindings/clock/mt8192-clk.h>
+#include <dt-bindings/gce/mt8192-gce.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
@@ -552,6 +553,15 @@
 			#size-cells = <0>;
 		};
 
+		gce: mailbox@10228000 {
+			compatible = "mediatek,mt8192-gce";
+			reg = <0 0x10228000 0 0x4000>;
+			interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
+			#mbox-cells = <3>;
+			clocks = <&infracfg CLK_INFRA_GCE>;
+			clock-names = "gce";
+		};
+
 		scp_adsp: clock-controller@10720000 {
 			compatible = "mediatek,mt8192-scp_adsp";
 			reg = <0 0x10720000 0 0x1000>;
-- 
2.18.0


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