[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops
From: Russell King - ARM Linux <hidden>
Date: 2010-05-17 11:31:19
From: Russell King - ARM Linux <hidden>
Date: 2010-05-17 11:31:19
On Mon, May 17, 2010 at 02:26:38PM +0300, Ronen Shitrit wrote:
quoted
How can you say that the current line won't be evicted?[Ronen Shitrit] Since the only ldr I see around is the ldr to the next line and next line will go to different line on the cache...
I think you mean different index, and yes, you're right about that. However, I still feel that your solution is unsafe as long as speculative prefetch is enabled; the assumption with speculative prefetch from an architectural point of view is to assume that the CPU has infinite prefetching. The fact that we have non-ARM ARMv6 CPUs which do prefetch in ways we don't know about means that we can't assume that ARMv6 CPUs aren't going to have aggressive prefetching.