[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops

[PATCH 0/8] Various patches for comments and upstream · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 1/8] ARM: Improve the L2 cache performance when PL310 is used · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 1/8] ARM: Improve the L2 cache performance when PL310 is used · Jason McMullan <hidden> · 2010-05-04
[PATCH 1/8] ARM: Improve the L2 cache performance when PL310 is used · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-05
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Jason McMullan <hidden> · 2010-05-04
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-05
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · George G. Davis <hidden> · 2010-05-05
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-06
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · George G. Davis <hidden> · 2010-05-06
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in the ARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-12
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-13
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-13
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · George G. Davis <hidden> · 2010-05-13
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-13
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · George G. Davis <hidden> · 2010-05-13
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-14
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-14
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · George G. Davis <hidden> · 2010-05-15
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-16
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-16
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-16
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Russell King - ARM Linux <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · Ronen Shitrit <hidden> · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership in theARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 2/8] ARM: Implement read/write for ownership intheARMv6 DMA cache ops · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-17
[PATCH 3/8] ARM: Align machine_desc.phys_io to a 1MB section · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 4/8] ARM: Remove the domain switching on ARMv6k/v7 CPUs · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 5/8] ARM: Fix the __arm_ioremap_caller() definition in nommu.c · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 5/8] ARM: Fix the __arm_ioremap_caller() definition in nommu.c · Russell King - ARM Linux <hidden> · 2010-05-04
[PATCH 6/8] ARM: Implement copy_to_user_page() for noMMU · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 6/8] ARM: Implement copy_to_user_page() for noMMU · Russell King - ARM Linux <hidden> · 2010-05-04
[PATCH 7/8] ARM: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 7/8] ARM: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP · Russell King - ARM Linux <hidden> · 2010-05-28
[PATCH 7/8] ARM: Use the Inner Shareable I-cache and BTB opson ARMv7 SMP · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-28
[PATCH 8/8] ARM: Implement phys_mem_access_prot() to avoid attributes aliasing · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04
[PATCH 0/8] Various patches for comments and upstream · catalin.marinas@arm.com (Catalin Marinas) · 2010-05-04

STALE5865d

From: catalin.marinas@arm.com (Catalin Marinas)
Date: 2010-05-17 09:51:00

On Sun, 2010-05-16 at 07:29 +0100, Ronen Shitrit wrote:

Our ARMv6 do speculative rd for both I and D cache...

I'll check with the hardware guys here in ARM and get back to you.

-- 
Catalin

`h`	back out one level
`j`	next message in thread
`k`	previous message in thread
`l`	drill in
`Esc`	close help / fold thread tree
`?`	toggle this help