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WIMG=0000, are you sure?  Not M=1?

To be honest, I don't recall the details now.
But it was tested in the very early days, the result was not the
expected one and, in the end, manual cache coherency management was
still needed.

Sure, the memory controllers don't do coherency.  I'm slightly worried
about two things:
1) Will the generic code use M=0 as well?  Is it a problem if it
doesn't?
2) Do lwarx. etc. work in M=0?

And a question: does M=0 actually give better performance (lower bus
utilisation, and maybe saves a few cycles)?

I think that the generic code uses M=0 _except_ for SMP and some platforms
(see comment in cputable.h).
And yes, the generic code works with these processors :)

I meant, if it doesn't, does it give conflicts.  But I did some
reading up and M=0 is indeed the way to go, so all is fine :-)

M=0 should have a lower bus utilization, yes.
Also M=0 is a requirement if you use some Gekko/Broadway features like the
locked (half-)cache.

Well we don't use that, but point taken.


Segher