[PATCH 36/61] mpc82xx: Factor PCI init out of mpc8272ads.

@@ -161,8 +161,7 @@
 			interrupt-controller;
 			reg = <10c00 80>;
 			built-in;
-			device_type = "cpm-pic";
-			compatible = "CPM2";
+			compatible = "fsl,pq2-pic";
 		};
 
 		pci@0500 {

@@ -249,7 +249,7 @@
 				interrupt-parent = <&mpic>;
 				reg = <90c00 80>;
 				built-in;
-				device_type = "cpm-pic";
+				compatible = "fsl,pq2-pic";
 			};
 
 			scc@91a00 {

@@ -18,11 +18,12 @@
 #include <linux/fs_enet_pd.h>
 
 #include <asm/io.h>
-#include <asm/pci-bridge.h>
 #include <asm/mpc8260.h>
 #include <asm/cpm2.h>
 #include <asm/udbg.h>
 #include <asm/i8259.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
 #include <asm/time.h>
 
 #include <platforms/82xx/pq2.h>

@@ -35,29 +36,15 @@
 
 static void __init mpc8272ads_pic_init(void)
 {
-	struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
-	struct resource r;
-	cpm2_map_t *cpm_reg;
-
-	if (np == NULL) {
+	struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+	if (!np) {
 		printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
 		return;
 	}
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_ERR "PIC init: invalid resource\n");
-		of_node_put(np);
-		return;
-	}
+
 	cpm2_pic_init(np);
 	of_node_put(np);
 
-	/* Initialize the default interrupt mapping priorities,
-	 * in case the boot rom changed something on us.
-	 */
-	cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
-	cpm_reg->im_intctl.ic_siprr = 0x05309770;
-	iounmap(cpm_reg);
-
 	/* Initialize stuff for the 82xx CPLD IC and install demux  */
 	pq2ads_pci_init_irq();
 }

@@ -302,67 +289,12 @@ void __init mpc8272ads_board_setup(void)
 	iounmap(immap);
 }
 
-#ifdef CONFIG_PCI
-static int m82xx_pci_exclude_device(struct pci_controller *hose,
-				    u_char bus, u_char devfn)
-{
-	if (bus == 0 && PCI_SLOT(devfn) == 0)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-	else
-		return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init mpc82xx_add_bridge(struct device_node *np)
-{
-	int len;
-	struct pci_controller *hose;
-	struct resource r;
-	const int *bus_range;
-	const uint *ptr;
-
-	memset(&r, 0, sizeof(r));
-	if (of_address_to_resource(np, 0, &r)) {
-		printk(KERN_INFO "No PCI reg property in device tree\n");
-		return;
-	}
-	if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
-		printk(KERN_INFO "No clock-frequency property in PCI node");
-		return;
-	}
-	of_node_put(np);
-	bus_range = of_get_property(np, "bus-range", &len);
-	if (bus_range == NULL || len < 2 * sizeof(int)) {
-		printk(KERN_WARNING "Can't get bus-range for %s, assume"
-		       " bus 0\n", np->full_name);
-	}
-
-	pci_assign_all_buses = 1;
-
-	hose = pcibios_alloc_controller(np);
-
-	if (!hose)
-		return;
-
-	hose->first_busno = bus_range ? bus_range[0] : 0;
-	hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
-	setup_indirect_pci(hose,
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
-			   r.start + offsetof(pci_cpm2_t, pci_cfg_data));
-
-	pci_process_bridge_OF_ranges(hose, np, 1);
-}
-#endif
 
 /*
  * Setup the architecture
  */
 static void __init mpc8272ads_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-	struct device_node *np;
-#endif
-
 	if (ppc_md.progress)
 		ppc_md.progress("mpc8272ads_setup_arch()", 0);
 	cpm2_reset();

@@ -371,13 +303,7 @@ static void __init mpc8272ads_setup_arch(void)
 
 	mpc8272ads_board_setup();
 
-#ifdef CONFIG_PCI
-	ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
-	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
-		mpc82xx_add_bridge(np);
-
-	of_node_put(np);
-#endif
+	pq2_init_pci();
 
 	if (ppc_md.progress)
 		ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);

@@ -16,6 +16,7 @@
 
 #include <asm/cpm2.h>
 #include <asm/io.h>
+#include <asm/pci-bridge.h>
 #include <asm/system.h>
 
 #include <platforms/82xx/pq2.h>

@@ -42,3 +43,46 @@ void pq2_halt(void)
 	while (1)
 		;
 }
+
+#ifdef CONFIG_PCI
+static int pq2_pci_exclude_device(struct pci_controller *hose,
+                                  u_char bus, u8 devfn)
+{
+	if (bus == 0 && PCI_SLOT(devfn) == 0)
+		return PCIBIOS_DEVICE_NOT_FOUND;
+	else
+		return PCIBIOS_SUCCESSFUL;
+}
+
+static void __init pq2_pci_add_bridge(struct device_node *np)
+{
+	struct pci_controller *hose;
+	struct resource r;
+
+	if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b) {
+		printk(KERN_ERR "No valid PCI reg property in device tree\n");
+		return;
+	}
+
+	pci_assign_all_buses = 1;
+
+	hose = pcibios_alloc_controller(np);
+	if (!hose)
+		return;
+
+	hose->arch_data = np;
+
+	setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104);
+	pci_process_bridge_OF_ranges(hose, np, 1);
+}
+
+void __init pq2_init_pci(void)
+{
+	struct device_node *np = NULL;
+
+	ppc_md.pci_exclude_device = pq2_pci_exclude_device;
+
+	while ((np = of_find_compatible_node(np, NULL, "fsl,pq2-pci")))
+		pq2_pci_add_bridge(np);
+}
+#endif

@@ -3,14 +3,21 @@
 
 void pq2_restart(char *cmd);
 void pq2_halt(void);
+int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
 
 #ifdef CONFIG_PCI
 int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
 #else
 static inline int pq2ads_pci_init_irq(void)
 {
 	return 0;
 }
+
+static inline void pq2_init_pci(void)
+{
+}
 #endif
 
 #endif

@@ -54,7 +54,6 @@
 #define SIU_INT_SCC3		((uint)0x2a+CPM_IRQ_OFFSET)
 #define SIU_INT_SCC4		((uint)0x2b+CPM_IRQ_OFFSET)
 
-void m82xx_pci_init_irq(void);
 void m82xx_show_cpuinfo(struct seq_file *);
 
 #endif /* __MACH_ADS8260_DEFS */