Hi Claudiu,

-----Original Message-----
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Sent: Thursday, February 26, 2026 12:25 PM
To: John Madieu <john.madieu.xa@bp.renesas.com>; Claudiu Beznea
[off-list ref]; lpieralisi@kernel.org;
kwilczynski@kernel.org; mani@kernel.org; geert+renesas@glider.be;
krzk+dt@kernel.org
Cc: robh@kernel.org; bhelgaas@google.com; conor+dt@kernel.org;
magnus.damm [off-list ref]; Biju Das
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soc@vger.kernel.org; devicetree@vger.kernel.org; linux-
clk@vger.kernel.org; john.madieu@gmail.com
Subject: Re: [PATCH v6 12/16] PCI: rzg3s-host: Add PCIe Gen3 (8.0 GT/s)
link speed support

Hi, John,

On 2/20/26 00:35, John Madieu wrote:

quoted

Extend the link speed configuration to support Gen3 (8.0 GT/s) in
addition to Gen2 (5.0 GT/s). This is required for RZ/G3E PCIe host
support, which is
Gen3 capable.

Instead of relying on DT max-link-speed for configuration, read the
hardware

checkpatch warning on this line:

WARNING: Prefer a maximum 75 chars per line (possible unwrapped commit
description?)
#10:
Instead of relying on DT max-link-speed for configuration, read the
hardware

Could you please adjust it?

Will be done in v7.

Regards,
John

Thank you,
Claudiu