[PATCH v1 17/50] clk: samsung: add CLK_MOUT_MMC0 in the Exynos5420
From: Lukasz Luba <hidden>
Date: 2019-07-15 12:47:44
Also in:
linux-clk, linux-devicetree, linux-samsung-soc, lkml
Subsystem:
common clk framework, samsung soc clock drivers, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Krzysztof Kozlowski, Sylwester Nawrocki, Chanwoo Choi, Peter Griffin, Linus Torvalds
Add ID to mout_mmc0 MUX to make possible children connection in the DT. Signed-off-by: Lukasz Luba <redacted> --- drivers/clk/samsung/clk-exynos5420.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index ead569a164cf..8d58801baf2c 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c@@ -763,7 +763,7 @@ static const struct samsung_mux_clock exynos5x_mux_clks[] __initconst = { /* FSYS Block */ MUX(0, "mout_usbd301", mout_group2_p, SRC_FSYS, 4, 3), - MUX(0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), + MUX(CLK_MOUT_MMC0, "mout_mmc0", mout_group2_p, SRC_FSYS, 8, 3), MUX(0, "mout_mmc1", mout_group2_p, SRC_FSYS, 12, 3), MUX(0, "mout_mmc2", mout_group2_p, SRC_FSYS, 16, 3), MUX(0, "mout_usbd300", mout_group2_p, SRC_FSYS, 20, 3),
--
2.17.1
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