[PATCH v3 18/24] drm/sun4i: DW HDMI PHY: Add support for second PLL

On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec [off-list ref] wrote:

Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
between two clock parents.

Add code which reads second PLL from DT.

Signed-off-by: Jernej Skrabec <redacted>

This patch by itself does not do anything. It should be merged with the
next one.