[PATCH v8 06/14] net: phy: at803x: add qca8084_link_change_notify
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STALE1014d
From: Luo Jie <hidden>
Date: 2023-12-15 07:41:16
Also in:
linux-devicetree, linux-doc, lkml
Subsystem:
ethernet phy library, networking drivers, the rest · Maintainers:
Andrew Lunn, Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Revision v8 of 6 in this series.
Revisions (6)
When the link is changed, qca8084 needs to do the fifo reset and adjust the IPG level for the qusgmii link speed 1000M. Signed-off-by: Luo Jie <redacted> --- drivers/net/phy/at803x.c | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+)
diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index 252fae4329cc..bb382089ab77 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c@@ -289,6 +289,13 @@ #define QCA8084_MSE_THRESHOLD 0x800a #define QCA8084_MSE_THRESHOLD_2P5G_VAL 0x51c6 +#define QCA8084_FIFO_CONTROL 0x19 +#define QCA8084_FIFO_MAC_2_PHY BIT(1) +#define QCA8084_FIFO_PHY_2_MAC BIT(0) + +#define QCA8084_MMD7_IPG_OP 0x901d +#define QCA8084_IPG_10_TO_11_EN BIT(0) + MODULE_DESCRIPTION("Qualcomm Atheros AR803x and QCA808X PHY driver"); MODULE_AUTHOR("Matus Ujhelyi"); MODULE_LICENSE("GPL");
@@ -2192,6 +2199,39 @@ static int qca8084_config_init(struct phy_device *phydev) QCA8084_MSE_THRESHOLD_2P5G_VAL); } +static void qca8084_link_change_notify(struct phy_device *phydev) +{ + int ret; + + ret = phy_modify(phydev, QCA8084_FIFO_CONTROL, + QCA8084_FIFO_MAC_2_PHY | QCA8084_FIFO_PHY_2_MAC, + 0); + if (ret) + return; + + /* If the PHY works on PHY_INTERFACE_MODE_10G_QXGMII mode, the fifo + * needs to be kept as reset state in link down status. + */ + if (phydev->interface != PHY_INTERFACE_MODE_10G_QXGMII || + phydev->link) { + msleep(50); + ret = phy_modify(phydev, QCA8084_FIFO_CONTROL, + QCA8084_FIFO_MAC_2_PHY | + QCA8084_FIFO_PHY_2_MAC, + QCA8084_FIFO_MAC_2_PHY | + QCA8084_FIFO_PHY_2_MAC); + if (ret) + return; + } + + /* Enable IPG 10 to 11 tuning on link speed 1000M of QUSGMII mode. */ + if (phydev->interface == PHY_INTERFACE_MODE_10G_QXGMII) + phy_modify_mmd(phydev, MDIO_MMD_AN, QCA8084_MMD7_IPG_OP, + QCA8084_IPG_10_TO_11_EN, + phydev->speed == SPEED_1000 ? + QCA8084_IPG_10_TO_11_EN : 0); +} + static struct phy_driver at803x_driver[] = { { /* Qualcomm Atheros AR8035 */
@@ -2388,6 +2428,7 @@ static struct phy_driver at803x_driver[] = { .cable_test_start = qca808x_cable_test_start, .cable_test_get_status = qca808x_cable_test_get_status, .config_init = qca8084_config_init, + .link_change_notify = qca8084_link_change_notify, }, }; module_phy_driver(at803x_driver);
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2.42.0