RE: [PATCH 10/10] ravb: Initialize GbEthernet E-MAC
From: Biju Das <biju.das.jz@bp.renesas.com>
Date: 2021-10-04 19:33:44
Also in:
linux-renesas-soc
-----Original Message----- From: Sergey Shtylyov <redacted> Sent: 04 October 2021 20:28 To: Biju Das <biju.das.jz@bp.renesas.com>; David S. Miller [off-list ref]; Jakub Kicinski [off-list ref] Cc: Sergei Shtylyov <redacted>; Geert Uytterhoeven [off-list ref]; Sergey Shtylyov [off-list ref]; Adam Ford [off-list ref]; Andrew Lunn [off-list ref]; Yuusuke Ashizuka [off-list ref]; Yoshihiro Shimoda [off-list ref]; netdev@vger.kernel.org; linux-renesas- soc@vger.kernel.org; Chris Paterson [off-list ref]; Biju Das [off-list ref]; Prabhakar Mahadev Lad <prabhakar.mahadev- lad.rj@bp.renesas.com> Subject: Re: [PATCH 10/10] ravb: Initialize GbEthernet E-MAC On 10/4/21 10:23 PM, Biju Das wrote: [...]quoted
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Initialize GbEthernet E-MAC found on RZ/G2L SoC. This patch also renames ravb_set_rate to ravb_set_rate_rcar and ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with the naming convention used in sh_eth driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> --- RFC->v1: * Moved CSR0 intialization to later patch. * started using ravb_modify for initializing link registers. --- drivers/net/ethernet/renesas/ravb.h | 20 +++++++-- drivers/net/ethernet/renesas/ravb_main.c | 55 ++++++++++++++++++++---- 2 files changed, 62 insertions(+), 13 deletions(-)[...]quoted
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diff --git a/drivers/net/ethernet/renesas/ravb_main.cb/drivers/net/ethernet/renesas/ravb_main.c index 3e694738e683..9a4888543384 100644--- a/drivers/net/ethernet/renesas/ravb_main.c +++ b/drivers/net/ethernet/renesas/ravb_main.c[...]quoted
@@ -449,10 +461,35 @@ static int ravb_ring_init(struct net_device*ndev, int q) static void ravb_emac_init_gbeth(struct net_device *ndev) { - /* Place holder */ + struct ravb_private *priv = netdev_priv(ndev); + + /* Receive frame limit set register */ + ravb_write(ndev, GBETH_RX_BUFF_MAX + ETH_FCS_LEN, RFLR); + + /* PAUSE prohibition */Should be: /* EMAC Mode: PAUSE prohibition; Duplex; TX; RX */
Why do we need ";" in between? Just checking or ":" is sufficient throughout?
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+ ravb_write(ndev, ECMR_ZPF | ((priv->duplex > 0) ? ECMR_DM : 0) | + ECMR_TE | ECMR_RE | ECMR_RCPT | + ECMR_TXF | ECMR_RXF | ECMR_PRM, ECMR); + + ravb_set_rate_gbeth(ndev); + + /* Set MAC address */ + ravb_write(ndev, + (ndev->dev_addr[0] << 24) | (ndev->dev_addr[1] << 16) | + (ndev->dev_addr[2] << 8) | (ndev->dev_addr[3]), MAHR); + ravb_write(ndev, (ndev->dev_addr[4] << 8) | (ndev->dev_addr[5]), +MALR); + + /* E-MAC status register clear */ + ravb_write(ndev, ECSR_ICD | ECSR_LCHNG | ECSR_PFRI, ECSR); + + /* E-MAC interrupt enable register */ + ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);Too much repetitive code, I think...Can you please clarify what are the codes repetitive here?MAHR/MALR reading, mainly... The following code turned out to be different from gen2/3 indeed...
It is OK. Only for just saving 2 writes we don't need to introduce a new function. Regards, Biju
[...] MBR, Sergey