From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:21
The DMAC and EMAC blocks of Gigabit Ethernet IP found on RZ/G2L SoC are
similar to the R-Car Ethernet AVB IP.
The Gigabit Ethernet IP consists of Ethernet controller (E-MAC), Internal
TCP/IP Offload Engine (TOE) and Dedicated Direct memory access controller
(DMAC).
With a few changes in the driver we can support both IPs.
This patch series aims to add Gigabit ethernet driver support to RZ/G2L SoC.
Please provide your valuable comments.
Ref:-
* https://lore.kernel.org/linux-renesas-soc/TYCPR01MB59334319695607A2683C1A5E86E59@TYCPR01MB5933.jpnprd01.prod.outlook.com/T/#t
Biju Das (18):
ravb: Rename "ravb_set_features_rx_csum" function to
"ravb_set_features_rcar"
ravb: Rename the variables "no_ptp_cfg_active" and "ptp_cfg_active"
ravb: Initialize GbEthernet dmac
ravb: Enable aligned_tx and tx_counters for RZ/G2L
ravb: Exclude gPTP feature support for RZ/G2L
ravb: Add multi_tsrq to struct ravb_hw_info
ravb: Add magic_pkt to struct ravb_hw_info
ravb: Add mii_rgmii_selection to struct ravb_hw_info
ravb: Add half_duplex to struct ravb_hw_info
ravb: Initialize GbEthernet E-MAC
ravb: Add rx_2k_buffers to struct ravb_hw_info
ravb: Add timestamp to struct ravb_hw_info
ravb: Add rx_ring_free function support for GbEthernet
ravb: Add rx_ring_format function for GbEthernet
ravb: Add rx_alloc helper function for GbEthernet
ravb: Add Packet receive function for Gigabit Ethernet
ravb: Add carrier_counters to struct ravb_hw_info
ravb: Add set_feature support for RZ/G2L
drivers/net/ethernet/renesas/ravb.h | 91 +++-
drivers/net/ethernet/renesas/ravb_main.c | 631 ++++++++++++++++++++---
2 files changed, 630 insertions(+), 92 deletions(-)
--
2.17.1
Rename "ravb_set_features_rx_csum" function to "ravb_set_features_rcar" and
replace the function pointer "set_rx_csum_feature" with "set_feature".
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Suggested-by: Sergey Shtylyov <redacted>
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:28
Rename the variable "no_ptp_cfg_active" with "no_gptp" with inverted
checks and "ptp_cfg_active" with "ccc_gac".
There is no functional change.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Suggested-by: Sergey Shtylyov <redacted>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++--
drivers/net/ethernet/renesas/ravb_main.c | 25 ++++++++++++------------
2 files changed, 14 insertions(+), 15 deletions(-)
@@ -1000,8 +1000,8 @@ struct ravb_hw_info {unsignedinternal_delay:1;/* AVB-DMAC has internal delays */unsignedtx_counters:1;/* E-MAC has TX counters */unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple irqs */-unsignedno_ptp_cfg_active:1;/* AVB-DMAC does not support gPTP active in config mode */-unsignedptp_cfg_active:1;/* AVB-DMAC has gPTP support active in config mode */+unsignedno_gptp:1;/* AVB-DMAC does not support gPTP feature */+unsignedccc_gac:1;/* AVB-DMAC has gPTP support active in config mode */};structravb_private{
@@ -1752,7 +1752,7 @@ static int ravb_close(struct net_device *ndev)ravb_write(ndev,0,TIC);/* Stop PTP Clock driver */-if(info->no_ptp_cfg_active)+if(!info->no_gptp&&!info->ccc_gac)ravb_ptp_stop(ndev);/* Set the config mode to stop the AVB-DMAC's processes */
@@ -1000,8 +1000,8 @@ struct ravb_hw_info {unsignedinternal_delay:1;/* AVB-DMAC has internal delays */unsignedtx_counters:1;/* E-MAC has TX counters */unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple irqs */-unsignedno_ptp_cfg_active:1;/* AVB-DMAC does not support gPTP active in config mode */-unsignedptp_cfg_active:1;/* AVB-DMAC has gPTP support active in config mode */+unsignedno_gptp:1;/* AVB-DMAC does not support gPTP feature */
Judging on the flag usage (which ensues using logical not in every case), I'd suggest to
invert this flag and call it 'gptp'...
[...]
MBR, Sergey
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 16:35:49
Hi Sergei,
Thanks for the feedback.
-----Original Message-----
Subject: Re: [RFC/PATCH 02/18] ravb: Rename the variables
"no_ptp_cfg_active" and "ptp_cfg_active"
On 9/23/21 5:07 PM, Biju Das wrote:
quoted
Rename the variable "no_ptp_cfg_active" with "no_gptp" with inverted
checks and "ptp_cfg_active" with "ccc_gac".
That's not exactly rename, no? At least for the 1st case...
@@ -1000,8 +1000,8 @@ struct ravb_hw_info {unsignedinternal_delay:1;/* AVB-DMAC has internal delays */unsignedtx_counters:1;/* E-MAC has TX counters */unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple
irqs */
quoted
- unsigned no_ptp_cfg_active:1; /* AVB-DMAC does not support gPTP
active in config mode */
quoted
- unsigned ptp_cfg_active:1; /* AVB-DMAC has gPTP support active in
config mode */
quoted
+ unsigned no_gptp:1; /* AVB-DMAC does not support gPTP
feature */
Judging on the flag usage (which ensues using logical not in every
case), I'd suggest to invert this flag and call it 'gptp'...
We have the following cases
Case 1) On R-Car Gen3, gPTP support is active in config mode.
Case 2) On R-Car Gen2, gPTP support is not active in config mode.
Case 3) RZ/G2L does not support the gPTP feature.
And I came up with patches [1] and [2]. Then as per discussion we agreed for gPTP support active in config(ccc_gac) which take care of Case 1, no_gptp which take care of case 3
And the cases not under 1 and 3 falls to 2.
[1]
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210825070154.14336-4-biju.das.jz@bp.renesas.com/
[2]
https://patchwork.kernel.org/project/linux-renesas-soc/patch/20210825070154.14336-5-biju.das.jz@bp.renesas.com/
So please clear on your proposals to accomodate the 3 use cases as mentioned below.
Case 1) On R-Car Gen3, gPTP support is active in config mode.
Case 2) On R-Car Gen2, gPTP support is not active in config mode.
Case 3) RZ/G2L does not support the gPTP feature.
Regards,
Biju
Sorry, I've changed my mind about 'no_gpgp' after seeing all the checks. I'd like to avoiud the double negations
in those checks -- this should make the code more clear. My 1st idea (just 'gp[tp') turned out to be more practical,
sorry about this going back-and-forth. :-<
[...]
MBR, Sergey
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 18:20:51
Hi Sergei,
Subject: Re: [RFC/PATCH 02/18] ravb: Rename the variables
"no_ptp_cfg_active" and "ptp_cfg_active"
On 9/23/21 7:35 PM, Biju Das wrote:
[...]
quoted
quoted
quoted
Rename the variable "no_ptp_cfg_active" with "no_gptp" with inverted
checks and "ptp_cfg_active" with "ccc_gac".
That's not exactly rename, no? At least for the 1st case...
This is what we agreed as per last discussion[1].
https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
hwork.kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F2021082507015
4.14336-5-biju.das.jz%40bp.renesas.com%2F&data=04%7C01%7Cbiju.das.
jz%40bp.renesas.com%7Cec41661b87e14f9e810808d97ebbae07%7C53d82571da194
7e49cb4625a166a4a2a%7C0%7C0%7C637680166814248680%7CUnknown%7CTWFpbGZsb
3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
7C1000&sdata=ze0ica0K57exFOSQ9LyMuQ%2FFimvOW4PtH8ETxYJ8o6Y%3D&
reserved=0
Sorry, I've changed my mind about 'no_gpgp' after seeing all the
checks. I'd like to avoiud the double negations in those checks -- this
should make the code more clear. My 1st idea (just 'gp[tp') turned out to
be more practical, sorry about this going back-and-forth. :-<
So Just to confirm the name to be used are "ccc_gac" and "gptp".
Case 1) On R-Car Gen3, gPTP support is active in config mode. (replace "ptp_cfg_active" with "ccc_gac")
Case 2) On R-Car Gen2, gPTP support is not active in config mode ( replace "no_ptp_cfg_active" with "gptp")
Case 3) RZ/G2L does not support the gPTP feature(if "no_gac" or "gptp" then it falls to case 3).
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:34:30
Hi Sergei,
Subject: RE: [RFC/PATCH 02/18] ravb: Rename the variables
"no_ptp_cfg_active" and "ptp_cfg_active"
Hi Sergei,
quoted
Subject: Re: [RFC/PATCH 02/18] ravb: Rename the variables
"no_ptp_cfg_active" and "ptp_cfg_active"
On 9/23/21 7:35 PM, Biju Das wrote:
[...]
quoted
quoted
quoted
Rename the variable "no_ptp_cfg_active" with "no_gptp" with
inverted checks and "ptp_cfg_active" with "ccc_gac".
That's not exactly rename, no? At least for the 1st case...
This is what we agreed as per last discussion[1].
https://jpn01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
tc
hwork.kernel.org%2Fproject%2Flinux-renesas-soc%2Fpatch%2F20210825070
15
4.14336-5-biju.das.jz%40bp.renesas.com%2F&data=04%7C01%7Cbiju.das.
jz%40bp.renesas.com%7Cec41661b87e14f9e810808d97ebbae07%7C53d82571da1
94
7e49cb4625a166a4a2a%7C0%7C0%7C637680166814248680%7CUnknown%7CTWFpbGZ
sb
3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
D%
7C1000&sdata=ze0ica0K57exFOSQ9LyMuQ%2FFimvOW4PtH8ETxYJ8o6Y%3D&am
p;
reserved=0
Sorry, I've changed my mind about 'no_gpgp' after seeing all the
checks. I'd like to avoiud the double negations in those checks --
this should make the code more clear. My 1st idea (just 'gp[tp')
turned out to be more practical, sorry about this going
back-and-forth. :-<
So Just to confirm the name to be used are "ccc_gac" and "gptp".
Case 1) On R-Car Gen3, gPTP support is active in config mode. (replace
"ptp_cfg_active" with "ccc_gac") Case 2) On R-Car Gen2, gPTP support is
not active in config mode ( replace "no_ptp_cfg_active" with "gptp") Case
3) RZ/G2L does not support the gPTP feature(if "no_gac" or "gptp" then it
falls to case 3).
As per the above discussion, I have prepared a new patch.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:31
Initialize GbEthernet dmac found on RZ/G2L SoC.
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
to be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84 +++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
@@ -83,6 +83,11 @@ static int ravb_config(struct net_device *ndev)returnerror;}+staticvoidravb_rgeth_set_rate(structnet_device*ndev)+{+/* Place holder */+}+staticvoidravb_set_rate(structnet_device*ndev){structravb_private*priv=netdev_priv(ndev);
@@ -217,6 +222,11 @@ static int ravb_tx_free(struct net_device *ndev, int q, bool free_txed_only)returnfree_num;}+staticvoidravb_rx_ring_free_rgeth(structnet_device*ndev,intq)+{+/* Place holder */+}+staticvoidravb_rx_ring_free(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -283,6 +293,11 @@ static void ravb_ring_free(struct net_device *ndev, int q)priv->tx_skb[q]=NULL;}+staticvoidravb_rx_ring_format_rgeth(structnet_device*ndev,intq)+{+/* Place holder */+}+staticvoidravb_rx_ring_format(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -356,6 +371,12 @@ static void ravb_ring_format(struct net_device *ndev, int q)desc->dptr=cpu_to_le32((u32)priv->tx_desc_dma[q]);}+staticvoid*ravb_rgeth_alloc_rx_desc(structnet_device*ndev,intq)+{+/* Place holder */+returnNULL;+}+staticvoid*ravb_alloc_rx_desc(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -426,6 +447,11 @@ static int ravb_ring_init(struct net_device *ndev, int q)return-ENOMEM;}+staticvoidravb_rgeth_emac_init(structnet_device*ndev)+{+/* Place holder */+}+staticvoidravb_rcar_emac_init(structnet_device*ndev){/* Receive frame limit set register */
@@ -461,7 +487,32 @@ static void ravb_emac_init(struct net_device *ndev)info->emac_init(ndev);}-staticvoidravb_rcar_dmac_init(structnet_device*ndev)+staticvoidravb_dmac_init_rgeth(structnet_device*ndev)+{+/* Set AVB RX */+ravb_write(ndev,0x60000000,RCR);++/* Set Max Frame Length (RTC) */+ravb_write(ndev,0x7ffc0000|RGETH_RX_BUFF_MAX,RTC);++/* Set FIFO size */+ravb_write(ndev,0x00222200,TGC);++ravb_write(ndev,0,TCCR);++/* Frame receive */+ravb_write(ndev,RIC0_FRE0,RIC0);+/* Disable FIFO full warning */+ravb_write(ndev,0x0,RIC1);+/* Receive FIFO full error, descriptor empty */+ravb_write(ndev,RIC2_QFE0|RIC2_RFFE,RIC2);++ravb_write(ndev,0x0,RIC3);++ravb_write(ndev,TIC_FTE0,TIC);+}++staticvoidravb_dmac_init_rcar(structnet_device*ndev){structravb_private*priv=netdev_priv(ndev);conststructravb_hw_info*info=priv->info;
@@ -579,6 +630,14 @@ static void ravb_rx_csum(struct sk_buff *skb)skb_trim(skb,skb->len-sizeof(__sum16));}+/* Packet receive function for Gigabit Ethernet */+staticboolravb_rgeth_rx(structnet_device*ndev,int*quota,intq)+{+/* Place holder */+returntrue;+}++/* Packet receive function for Ethernet AVB */staticboolravb_rcar_rx(structnet_device*ndev,int*quota,intq){structravb_private*priv=netdev_priv(ndev);
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
to be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84 +++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 18:42:06
Hi Sergei,
Subject: Re: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
On 9/23/21 5:07 PM, Biju Das wrote:
quoted
Initialize GbEthernet dmac found on RZ/G2L SoC.
DMAC (or AVB-DMAC).
OK will change it to DMAC. AVB-DMAC is not applicable for GbEthernet.
quoted
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar to
be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84
+++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
Initialize GbEthernet dmac found on RZ/G2L SoC.
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
to be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84 +++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
@@ -83,6 +83,11 @@ static int ravb_config(struct net_device *ndev)returnerror;}+staticvoidravb_rgeth_set_rate(structnet_device*ndev)+{+/* Place holder */+}+staticvoidravb_set_rate(structnet_device*ndev){structravb_private*priv=netdev_priv(ndev);
@@ -217,6 +222,11 @@ static int ravb_tx_free(struct net_device *ndev, int q, bool free_txed_only)returnfree_num;}+staticvoidravb_rx_ring_free_rgeth(structnet_device*ndev,intq)+{+/* Place holder */+}+staticvoidravb_rx_ring_free(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -283,6 +293,11 @@ static void ravb_ring_free(struct net_device *ndev, int q)priv->tx_skb[q]=NULL;}+staticvoidravb_rx_ring_format_rgeth(structnet_device*ndev,intq)+{+/* Place holder */+}+staticvoidravb_rx_ring_format(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -356,6 +371,12 @@ static void ravb_ring_format(struct net_device *ndev, int q)desc->dptr=cpu_to_le32((u32)priv->tx_desc_dma[q]);}+staticvoid*ravb_rgeth_alloc_rx_desc(structnet_device*ndev,intq)+{+/* Place holder */+returnNULL;+}+staticvoid*ravb_alloc_rx_desc(structnet_device*ndev,intq){structravb_private*priv=netdev_priv(ndev);
@@ -426,6 +447,11 @@ static int ravb_ring_init(struct net_device *ndev, int q)return-ENOMEM;}+staticvoidravb_rgeth_emac_init(structnet_device*ndev)+{+/* Place holder */+}+staticvoidravb_rcar_emac_init(structnet_device*ndev){/* Receive frame limit set register */
@@ -461,7 +487,32 @@ static void ravb_emac_init(struct net_device *ndev)info->emac_init(ndev);}-staticvoidravb_rcar_dmac_init(structnet_device*ndev)+staticvoidravb_dmac_init_rgeth(structnet_device*ndev)+{+/* Set AVB RX */+ravb_write(ndev,0x60000000,RCR);++/* Set Max Frame Length (RTC) */+ravb_write(ndev,0x7ffc0000|RGETH_RX_BUFF_MAX,RTC);
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 19:23:05
HI Sergei,
Subject: Re: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
On 9/23/21 5:07 PM, Biju Das wrote:
quoted
Initialize GbEthernet dmac found on RZ/G2L SoC.
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar to
be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84
+++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index 0ce0c13ef8cb..bee05e6fb815 100644
Should be init'ed on gen3 as well? Matter of a separate patch, I can do
it prolly...
OK. May be after completing RZ/G2L, I can investigate on gen3 stuff or If you have R-Car board and confirm this change
Won't break anything on R-Car gen3, you can submit the patch.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 19:29:08
Hi Sergey,
Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
HI Sergei,
quoted
Subject: Re: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
On 9/23/21 5:07 PM, Biju Das wrote:
quoted
Initialize GbEthernet dmac found on RZ/G2L SoC.
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
to be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84
+++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index 0ce0c13ef8cb..bee05e6fb815 100644
@@ -81,6 +81,7 @@ enum ravb_reg {RQC3=0x00A0,RQC4=0x00A4,RPC=0x00B0,+RTC=0x00B4,/* RZ/G2L only */
My gen3 manual says the regiuster exists there...
The existing driver is not using it. Since manual says there is RTC, I will document for Gen3 as well.
quoted
quoted
UFCW = 0x00BC,
UFCS = 0x00C0,
UFCV0 = 0x00C4,
@@ -156,6 +157,7 @@ enum ravb_reg { TIS = 0x037C, ISS = 0x0380, CIE = 0x0384, /* R-Car Gen3 only */+ RIC3 = 0x0388, /* RZ/G2L only */
Again, this register (along with RIS3) exists on gen3...
RIS3 is not used by R-Car or RZ/G2L hence it not documented.
But RIC3 is used by RZ/G2L. As per gen3 hw manual it is present, so I will update the comment.
Should be init'ed on gen3 as well? Matter of a separate patch, I
can do it prolly...
OK. May be after completing RZ/G2L, I can investigate on gen3 stuff or If
you have R-Car board and confirm this change Won't break anything on R-Car
gen3, you can submit the patch.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:38:14
Hi Sergei,
Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
Hi Sergey,
quoted
Subject: RE: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
HI Sergei,
quoted
Subject: Re: [RFC/PATCH 03/18] ravb: Initialize GbEthernet dmac
On 9/23/21 5:07 PM, Biju Das wrote:
quoted
Initialize GbEthernet dmac found on RZ/G2L SoC.
This patch also renames ravb_rcar_dmac_init to ravb_dmac_init_rcar
to be consistent with the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 4 ++
drivers/net/ethernet/renesas/ravb_main.c | 84
+++++++++++++++++++++++-
2 files changed, 85 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index 0ce0c13ef8cb..bee05e6fb815 100644
@@ -81,6 +81,7 @@ enum ravb_reg {RQC3=0x00A0,RQC4=0x00A4,RPC=0x00B0,+RTC=0x00B4,/* RZ/G2L only */
My gen3 manual says the regiuster exists there...
The existing driver is not using it. Since manual says there is RTC, I
will document for Gen3 as well.
quoted
quoted
quoted
UFCW = 0x00BC,
UFCS = 0x00C0,
UFCV0 = 0x00C4,
@@ -156,6 +157,7 @@ enum ravb_reg { TIS = 0x037C, ISS = 0x0380, CIE = 0x0384, /* R-Car Gen3 only */+ RIC3 = 0x0388, /* RZ/G2L only */
Again, this register (along with RIS3) exists on gen3...
RIS3 is not used by R-Car or RZ/G2L hence it not documented.
But RIC3 is used by RZ/G2L. As per gen3 hw manual it is present, so I will
update the comment.
I am dropping RIC3 for RZ/G2L as default value is 0 and code is initializing with 0
Which is not needed.
Should be init'ed on gen3 as well? Matter of a separate patch, I
can do it prolly...
OK. May be after completing RZ/G2L, I can investigate on gen3 stuff or
If you have R-Car board and confirm this change Won't break anything
on R-Car gen3, you can submit the patch.
As mentioned above I am dropping this initialization for RIC3, as per H/W manual
Reset value of RIC3 is 0.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:35
RZ/G2L need 4byte address alignment like R-Car Gen2 and
it has tx_counters like R-Car Gen3. This patch enable
these features for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 2 +-
drivers/net/ethernet/renesas/ravb_main.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
On 9/23/21 5:07 PM, Biju Das wrote:
Somehow this patch haven't reached my OMP email -- I got it only thru
the linux-renesas-soc list... :-/
quoted hunk
RZ/G2L need 4byte address alignment like R-Car Gen2 and
it has tx_counters like R-Car Gen3. This patch enable
these features for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 2 +-
drivers/net/ethernet/renesas/ravb_main.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
Mhm, I don't see a connection between those 2 (other than they're both for RX). And anyway, this prolly
should be a part of the previous patch...
[...]
MBR, Sergey
Somehow this patch haven't reached my OMP email -- I got it only thru
the linux-renesas-soc list... :-/
quoted
RZ/G2L need 4byte address alignment like R-Car Gen2 and
it has tx_counters like R-Car Gen3. This patch enable
these features for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 18:14:02
Hi Sergei,
Thanks for the review.
Subject: Re: [RFC/PATCH 04/18] ravb: Enable aligned_tx and tx_counters for
RZ/G2L
On 9/23/21 5:07 PM, Biju Das wrote:
Somehow this patch haven't reached my OMP email -- I got it only thru
the linux-renesas-soc list... :-/
quoted
RZ/G2L need 4byte address alignment like R-Car Gen2 and it has
tx_counters like R-Car Gen3. This patch enable these features for
RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 2 +-
drivers/net/ethernet/renesas/ravb_main.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bee05e6fb815..bb92469d770e 100644
Mhm, I don't see a connection between those 2 (other than they're both
for RX). And anyway, this prolly should be a part of the previous patch...
There was a discussion to make smaller patches. If there is no objection, on
the next revision I will add this as part of previous patch.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:40:55
Hi Sergei,
Subject: RE: [RFC/PATCH 04/18] ravb: Enable aligned_tx and tx_counters for
RZ/G2L
Hi Sergei,
Thanks for the review.
quoted
Subject: Re: [RFC/PATCH 04/18] ravb: Enable aligned_tx and tx_counters
for RZ/G2L
On 9/23/21 5:07 PM, Biju Das wrote:
Somehow this patch haven't reached my OMP email -- I got it only
thru the linux-renesas-soc list... :-/
quoted
RZ/G2L need 4byte address alignment like R-Car Gen2 and it has
tx_counters like R-Car Gen3. This patch enable these features for
RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 2 +-
drivers/net/ethernet/renesas/ravb_main.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bee05e6fb815..bb92469d770e 100644
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:39
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling
no_gptp feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46 ++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
@@ -2159,13 +2163,15 @@ static void ravb_set_config_mode(struct net_device *ndev)structravb_private*priv=netdev_priv(ndev);conststructravb_hw_info*info=priv->info;-if(!info->no_gptp&&!info->ccc_gac){+if(info->no_gptp){ravb_modify(ndev,CCC,CCC_OPC,CCC_OPC_CONFIG);-/* Set CSEL value */-ravb_modify(ndev,CCC,CCC_CSEL,CCC_CSEL_HPB);-}else{+}elseif(info->ccc_gac){ravb_modify(ndev,CCC,CCC_OPC,CCC_OPC_CONFIG|CCC_GAC|CCC_CSEL_HPB);+}else{+ravb_modify(ndev,CCC,CCC_OPC,CCC_OPC_CONFIG);+/* Set CSEL value */+ravb_modify(ndev,CCC,CCC_CSEL,CCC_CSEL_HPB);}}
@@ -2348,13 +2354,15 @@ static int ravb_probe(struct platform_device *pdev)/* Set AVB config mode */ravb_set_config_mode(ndev);-/* Set GTI value */-error=ravb_set_gti(ndev);-if(error)-gotoout_disable_refclk;+if(!info->no_gptp){+/* Set GTI value */+error=ravb_set_gti(ndev);+if(error)+gotoout_disable_refclk;-/* Request GTI loading */-ravb_modify(ndev,GCCR,GCCR_LTI,GCCR_LTI);+/* Request GTI loading */+ravb_modify(ndev,GCCR,GCCR_LTI,GCCR_LTI);+}if(info->internal_delay){ravb_parse_delay_mode(np,ndev);
@@ -2547,13 +2555,15 @@ static int __maybe_unused ravb_resume(struct device *dev)/* Set AVB config mode */ravb_set_config_mode(ndev);-/* Set GTI value */-ret=ravb_set_gti(ndev);-if(ret)-returnret;+if(!info->no_gptp){+/* Set GTI value */+ret=ravb_set_gti(ndev);+if(ret)+returnret;-/* Request GTI loading */-ravb_modify(ndev,GCCR,GCCR_LTI,GCCR_LTI);+/* Request GTI loading */+ravb_modify(ndev,GCCR,GCCR_LTI,GCCR_LTI);+}if(info->internal_delay)ravb_set_delay_mode(ndev);
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling
no_gptp feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46 ++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
Mhm, I definitely don't like the way you "extend" the GbEthernet info structure. All the applicable flags
should be set in the last patch of the series, not amidst of it.
[...]
MBR, Sergey
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 19:13:35
Hi Sergei,
Thanks for the review.
-----Original Message-----
From: Sergey Shtylyov <redacted>
Sent: 23 September 2021 20:00
To: Biju Das <biju.das.jz@bp.renesas.com>; David S. Miller
[off-list ref]; Jakub Kicinski [off-list ref]
Cc: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>;
Andrew Lunn [off-list ref]; Sergei Shtylyov [off-list ref];
Geert Uytterhoeven [off-list ref]; Adam Ford
[off-list ref]; Yoshihiro Shimoda
[off-list ref]; netdev@vger.kernel.org; linux-renesas-
soc@vger.kernel.org; Chris Paterson [off-list ref]; Biju
Das [off-list ref]
Subject: Re: [RFC/PATCH 05/18] ravb: Exclude gPTP feature support for
RZ/G2L
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling no_gptp
feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46
++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
Mhm, I definitely don't like the way you "extend" the GbEthernet info
structure. All the applicable flags should be set in the last patch of the
series, not amidst of it.
According to me, It is clearer with smaller patches like, what we have done with previous 2 patch sets for factorisation.
Please correct me, if any one have different opinion.
Regards,
Biju
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling no_gptp
feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46
++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
Mhm, I definitely don't like the way you "extend" the GbEthernet info
structure. All the applicable flags should be set in the last patch of the
series, not amidst of it.
According to me, It is clearer with smaller patches like, what we have done with previous 2 patch sets for factorisation.
Please correct me, if any one have different opinion.
I'm afraid you'd get a partly functioning device with the RZ/G2 info introduced amidst of the series
and then the necessary flags/values added to it. This should definitely be avoided.
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 19:45:34
Hi Sergei,
Subject: Re: [RFC/PATCH 05/18] ravb: Exclude gPTP feature support for
RZ/G2L
On 9/23/21 10:13 PM, Biju Das wrote:
[...]
quoted
quoted
quoted
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling
no_gptp feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46
++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
Mhm, I definitely don't like the way you "extend" the GbEthernet
info structure. All the applicable flags should be set in the last
patch of the series, not amidst of it.
According to me, It is clearer with smaller patches like, what we have
done with previous 2 patch sets for factorisation.
quoted
Please correct me, if any one have different opinion.
I'm afraid you'd get a partly functioning device with the RZ/G2 info
introduced amidst of the series and then the necessary flags/values added
to it. This should definitely be avoided.
It is ok, It is understood, After replacing all the place holders only we get full functionality.
That is the reason place holders added in first patch, so that we can fill each function at later stage
By smaller patcher. Same case for feature bits.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:48:48
Hi Sergei,
Subject: RE: [RFC/PATCH 05/18] ravb: Exclude gPTP feature support for
RZ/G2L
Hi Sergei,
quoted
Subject: Re: [RFC/PATCH 05/18] ravb: Exclude gPTP feature support for
RZ/G2L
On 9/23/21 10:13 PM, Biju Das wrote:
[...]
quoted
quoted
quoted
R-Car supports gPTP feature whereas RZ/G2L does not support it.
This patch excludes gtp feature support for RZ/G2L by enabling
no_gptp feature bit.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb_main.c | 46
++++++++++++++----------
1 file changed, 28 insertions(+), 18 deletions(-)
Mhm, I definitely don't like the way you "extend" the GbEthernet
info structure. All the applicable flags should be set in the last
patch of the series, not amidst of it.
According to me, It is clearer with smaller patches like, what we
have
done with previous 2 patch sets for factorisation.
quoted
Please correct me, if any one have different opinion.
I'm afraid you'd get a partly functioning device with the RZ/G2
info introduced amidst of the series and then the necessary
flags/values added to it. This should definitely be avoided.
It is ok, It is understood, After replacing all the place holders only we
get full functionality.
That is the reason place holders added in first patch, so that we can fill
each function at later stage By smaller patcher. Same case for feature
bits.
OK, the new patch excluded gPTP support for RZ/G2L and Also as per your suggestion,dropped timestamp feature bit and merged that code in this patch.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:44
R-Car AVB-DMAC has 4 Transmit start Request queues, whereas
RZ/G2L has only 1 Transmit start Request queue(Best Effort)
Add a multi_tsrq hw feature bit to struct ravb_hw_info to enable
this only for R-Car. This will allow us to add single TSRQ support for
RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
@@ -1006,6 +1006,7 @@ struct ravb_hw_info {unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple irqs */unsignedno_gptp:1;/* AVB-DMAC does not support gPTP feature */unsignedccc_gac:1;/* AVB-DMAC has gPTP support active in config mode */+unsignedmulti_tsrq:1;/* AVB-DMAC has MULTI TSRQ */};structravb_private{
@@ -776,11 +776,17 @@ static void ravb_rcv_snd_enable(struct net_device *ndev)/* function for waiting dma process finished */staticintravb_stop_dma(structnet_device*ndev){+structravb_private*priv=netdev_priv(ndev);+conststructravb_hw_info*info=priv->info;interror;/* Wait for stopping the hardware TX process */-error=ravb_wait(ndev,TCCR,-TCCR_TSRQ0|TCCR_TSRQ1|TCCR_TSRQ2|TCCR_TSRQ3,0);+if(info->multi_tsrq)+error=ravb_wait(ndev,TCCR,+TCCR_TSRQ0|TCCR_TSRQ1|TCCR_TSRQ2|TCCR_TSRQ3,0);+else+error=ravb_wait(ndev,TCCR,TCCR_TSRQ0,0);+if(error)returnerror;
R-Car AVB-DMAC has 4 Transmit start Request queues, whereas
RZ/G2L has only 1 Transmit start Request queue(Best Effort)
Add a multi_tsrq hw feature bit to struct ravb_hw_info to enable
this only for R-Car. This will allow us to add single TSRQ support for
RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
@@ -1006,6 +1006,7 @@ struct ravb_hw_info {unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple irqs */unsignedno_gptp:1;/* AVB-DMAC does not support gPTP feature */unsignedccc_gac:1;/* AVB-DMAC has gPTP support active in config mode */+unsignedmulti_tsrq:1;/* AVB-DMAC has MULTI TSRQ */
@@ -776,11 +776,17 @@ static void ravb_rcv_snd_enable(struct net_device *ndev)/* function for waiting dma process finished */staticintravb_stop_dma(structnet_device*ndev){+structravb_private*priv=netdev_priv(ndev);+conststructravb_hw_info*info=priv->info;interror;/* Wait for stopping the hardware TX process */-error=ravb_wait(ndev,TCCR,-TCCR_TSRQ0|TCCR_TSRQ1|TCCR_TSRQ2|TCCR_TSRQ3,0);+if(info->multi_tsrq)+error=ravb_wait(ndev,TCCR,+TCCR_TSRQ0|TCCR_TSRQ1|TCCR_TSRQ2|TCCR_TSRQ3,0);+else+error=ravb_wait(ndev,TCCR,TCCR_TSRQ0,0);
Aren't the TSRQ1/2/3 bits reserved on RZ/G2L? If so, this new flag adds a little value, I think... unless
you plan to use this flag further in the series?
MBR, Sergei
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-24 06:21:32
Hi Sergei,
Thanks for the feedback.
Subject: Re: [RFC/PATCH 06/18] ravb: Add multi_tsrq to struct ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
R-Car AVB-DMAC has 4 Transmit start Request queues, whereas RZ/G2L has
only 1 Transmit start Request queue(Best Effort)
Add a multi_tsrq hw feature bit to struct ravb_hw_info to enable this
only for R-Car. This will allow us to add single TSRQ support for
RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bb92469d770e..c043ee555be4 100644
@@ -1006,6 +1006,7 @@ struct ravb_hw_info {unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple
irqs */
quoted
unsigned no_gptp:1; /* AVB-DMAC does not support gPTP
feature */
quoted
unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in
config mode */
quoted
+ unsigned multi_tsrq:1; /* AVB-DMAC has MULTI TSRQ */
Maybe 'single_tx_q' instead?
Since it is called transmit start request queue, it is better to be named as single_tsrq
to match with hardware manual and I will update the comment with "GbEthernet DMAC has single TSRQ"
Please let me know are you ok with it. Other wise I would like to use existing name.
Aren't the TSRQ1/2/3 bits reserved on RZ/G2L? If so, this new flag adds
a little value, I think... unless you plan to use this flag further in the
series?
It will be confusing for RZ/G2L users. HW manual does not describes TSRQ1/2/3
and we are writing undocumented registers which is reserved.
Tomorrow it can happen that this reserved bits(90% it will not happen) will be used for describing something else.
It is unsafe to use reserved bits. Are you agreeing with this?
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:55:06
Hi Sergei,
Subject: RE: [RFC/PATCH 06/18] ravb: Add multi_tsrq to struct ravb_hw_info
Hi Sergei,
Thanks for the feedback.
quoted
Subject: Re: [RFC/PATCH 06/18] ravb: Add multi_tsrq to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
R-Car AVB-DMAC has 4 Transmit start Request queues, whereas RZ/G2L
has only 1 Transmit start Request queue(Best Effort)
Add a multi_tsrq hw feature bit to struct ravb_hw_info to enable
this only for R-Car. This will allow us to add single TSRQ support
for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 12 ++++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bb92469d770e..c043ee555be4 100644
@@ -1006,6 +1006,7 @@ struct ravb_hw_info {unsignedmulti_irqs:1;/* AVB-DMAC and E-MAC has multiple
irqs */
quoted
unsigned no_gptp:1; /* AVB-DMAC does not support gPTP
feature */
quoted
unsigned ccc_gac:1; /* AVB-DMAC has gPTP support active in
config mode */
quoted
+ unsigned multi_tsrq:1; /* AVB-DMAC has MULTI TSRQ */
Maybe 'single_tx_q' instead?
Since it is called transmit start request queue, it is better to be named
as single_tsrq to match with hardware manual and I will update the comment
with "GbEthernet DMAC has single TSRQ"
Please let me know are you ok with it. Other wise I would like to use
existing name.
Aren't the TSRQ1/2/3 bits reserved on RZ/G2L? If so, this new flag
adds a little value, I think... unless you plan to use this flag
further in the series?
It will be confusing for RZ/G2L users. HW manual does not describes
TSRQ1/2/3 and we are writing undocumented registers which is reserved.
Tomorrow it can happen that this reserved bits(90% it will not happen)
will be used for describing something else.
It is unsafe to use reserved bits. Are you agreeing with this?
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:45
E-MAC on R-Car supports magic packet detection, whereas RZ/G2L
do not support this feature. Add magic_pkt to struct ravb_hw_info
and enable this feature only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
@@ -1007,6 +1007,7 @@ struct ravb_hw_info {unsignedno_gptp:1;/* AVB-DMAC does not support gPTP feature */unsignedccc_gac:1;/* AVB-DMAC has gPTP support active in config mode */unsignedmulti_tsrq:1;/* AVB-DMAC has MULTI TSRQ */+unsignedmagic_pkt:1;/* E-MAC supports magic packet detection */};structravb_private{
E-MAC on R-Car supports magic packet detection, whereas RZ/G2L
do not support this feature. Add magic_pkt to struct ravb_hw_info
and enable this feature only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-24 06:24:39
Hi Sergei,
Thanks for the feedback.
Subject: Re: [RFC/PATCH 07/18] ravb: Add magic_pkt to struct ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
E-MAC on R-Car supports magic packet detection, whereas RZ/G2L do not
support this feature. Add magic_pkt to struct ravb_hw_info and enable
this feature only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Didn't you miss ravb_get_wol() -- it needs a change as well...
I don't think it is required. Framework is taking care of this. Please see the output from target.
root@smarc-rzg2l:~# ethtool -s eth0 wol g
netlink error: Operation not supported
root@smarc-rzg2l:~#
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 13:57:07
Hi Sergei,
Subject: RE: [RFC/PATCH 07/18] ravb: Add magic_pkt to struct ravb_hw_info
Hi Sergei,
Thanks for the feedback.
quoted
Subject: Re: [RFC/PATCH 07/18] ravb: Add magic_pkt to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
E-MAC on R-Car supports magic packet detection, whereas RZ/G2L do
not support this feature. Add magic_pkt to struct ravb_hw_info and
enable this feature only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Didn't you miss ravb_get_wol() -- it needs a change as well...
I don't think it is required. Framework is taking care of this. Please see
the output from target.
root@smarc-rzg2l:~# ethtool -s eth0 wol g netlink error: Operation not
supported root@smarc-rzg2l:~#
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:48
E-MAC on RZ/G2L supports MII/RGMII selection. Add a
mii_rgmii_selection feature bit to struct ravb_hw_info
to support this for RZ/G2L.
Currently only selecting RGMII is supported.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 17 +++++++++++++++++
drivers/net/ethernet/renesas/ravb_main.c | 6 ++++++
2 files changed, 23 insertions(+)
@@ -189,6 +189,8 @@ enum ravb_reg {PIR=0x0520,PSR=0x0528,PIPR=0x052c,+CXR31=0x0530,/* Documented for RZ/G2L only */+CXR35=0x0540,/* Documented for RZ/G2L only */MPR=0x0558,PFTCR=0x055c,PFRCR=0x0560,
@@ -1128,6 +1128,7 @@ static int ravb_phy_init(struct net_device *ndev){structdevice_node*np=ndev->dev.parent->of_node;structravb_private*priv=netdev_priv(ndev);+conststructravb_hw_info*info=priv->info;structphy_device*phydev;structdevice_node*pn;phy_interface_tiface;
@@ -1173,6 +1174,10 @@ static int ravb_phy_init(struct net_device *ndev)netdev_info(ndev,"limited PHY to 100Mbit/s\n");}+if(info->mii_rgmii_selection&&+priv->phy_interface==PHY_INTERFACE_MODE_RGMII_ID)+ravb_write(ndev,ravb_read(ndev,CXR35)|CXR35_SEL_MODIN,CXR35);+/* 10BASE, Pause and Asym Pause is not supported */phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Half_BIT);phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Full_BIT);
E-MAC on RZ/G2L supports MII/RGMII selection. Add a
mii_rgmii_selection feature bit to struct ravb_hw_info
to support this for RZ/G2L.
Currently only selecting RGMII is supported.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 17 +++++++++++++++++
drivers/net/ethernet/renesas/ravb_main.c | 6 ++++++
2 files changed, 23 insertions(+)
+
/* 10BASE, Pause and Asym Pause is not supported */
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-25 06:23:46
Hi Sergei,
Thanks for the feedback.
Subject: Re: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
E-MAC on RZ/G2L supports MII/RGMII selection. Add a
mii_rgmii_selection feature bit to struct ravb_hw_info to support this
for RZ/G2L.
Currently only selecting RGMII is supported.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 17 +++++++++++++++++
drivers/net/ethernet/renesas/ravb_main.c | 6 ++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bce480fadb91..dfaf3121da44 100644
+
/* 10BASE, Pause and Asym Pause is not supported */
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 15:50:01
Hi Sergei,
Subject: RE: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
ravb_hw_info
Hi Sergei,
Thanks for the feedback.
quoted
Subject: Re: [RFC/PATCH 08/18] ravb: Add mii_rgmii_selection to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
E-MAC on RZ/G2L supports MII/RGMII selection. Add a
mii_rgmii_selection feature bit to struct ravb_hw_info to support
this for RZ/G2L.
Currently only selecting RGMII is supported.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 17 +++++++++++++++++
drivers/net/ethernet/renesas/ravb_main.c | 6 ++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index bce480fadb91..dfaf3121da44 100644
+
/* 10BASE, Pause and Asym Pause is not supported */
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_10baseT_Full_BIT);
@@ -1076,6 +1076,18 @@ static int ravb_poll(struct napi_struct *napi, int budget)returnbudget-quota;}+staticvoidravb_set_duplex_rgeth(structnet_device*ndev)+{+structravb_private*priv=netdev_priv(ndev);+u32ecmr=ravb_read(ndev,ECMR);++if(priv->duplex>0)/* Full */+ecmr|=ECMR_DM;+else/* Half */+ecmr&=~ECMR_DM;+ravb_write(ndev,ecmr,ECMR);+}+/* PHY state control function */staticvoidravb_adjust_link(structnet_device*ndev){
@@ -1106,6 +1124,8 @@ static void ravb_adjust_link(struct net_device *ndev)new_state=true;priv->link=0;priv->speed=0;+if(info->half_duplex)+priv->duplex=-1;}/* Enable TX and RX right over here, if E-MAC change is ignored */
@@ -1136,6 +1156,7 @@ static int ravb_phy_init(struct net_device *ndev)priv->link=0;priv->speed=0;+priv->duplex=-1;/* Try connecting to PHY */pn=of_parse_phandle(np,"phy-handle",0);
@@ -1178,15 +1199,17 @@ static int ravb_phy_init(struct net_device *ndev)priv->phy_interface==PHY_INTERFACE_MODE_RGMII_ID)ravb_write(ndev,ravb_read(ndev,CXR35)|CXR35_SEL_MODIN,CXR35);-/* 10BASE, Pause and Asym Pause is not supported */-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Half_BIT);-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Full_BIT);-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_Pause_BIT);-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_Asym_Pause_BIT);+if(!info->half_duplex){+/* 10BASE, Pause and Asym Pause is not supported */+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Half_BIT);+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_10baseT_Full_BIT);+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_Pause_BIT);+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_Asym_Pause_BIT);-/* Half Duplex is not supported */-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_1000baseT_Half_BIT);-phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_100baseT_Half_BIT);+/* Half Duplex is not supported */+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_1000baseT_Half_BIT);+phy_remove_link_mode(phydev,ETHTOOL_LINK_MODE_100baseT_Half_BIT);+}phy_attached_info(phydev);
RZ/G2L supports half duplex mode.
Add a half_duplex hw feature bit to struct ravb_hw_info for
supporting half duplex mode for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
[...]
Reviewed-by: Sergey Shtylyov <redacted>
Just a little bit of change needed...
[...]
@@ -1076,6 +1076,18 @@ static int ravb_poll(struct napi_struct *napi, int budget)returnbudget-quota;}+staticvoidravb_set_duplex_rgeth(structnet_device*ndev)+{+structravb_private*priv=netdev_priv(ndev);+u32ecmr=ravb_read(ndev,ECMR);++if(priv->duplex>0)/* Full */+ecmr|=ECMR_DM;+else/* Half */+ecmr&=~ECMR_DM;+ravb_write(ndev,ecmr,ECMR);
I think we should do that like sh_eth.c:
ravb_modify(ndev, ECMR, ECMR_DM, priv->duplex > 0 ? ECMR_DM : 0);
[...]
MBR, Sergey
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-25 06:37:11
Hi Sergei,
Thanks for the feedback.
Subject: Re: [RFC/PATCH 09/18] ravb: Add half_duplex to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
RZ/G2L supports half duplex mode.
Add a half_duplex hw feature bit to struct ravb_hw_info for supporting
half duplex mode for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
[...]
Reviewed-by: Sergey Shtylyov <redacted>
Just a little bit of change needed...
[...]
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 15:51:44
Hi Sergei,
Subject: Re: [RFC/PATCH 09/18] ravb: Add half_duplex to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
RZ/G2L supports half duplex mode.
Add a half_duplex hw feature bit to struct ravb_hw_info for supporting
half duplex mode for RZ/G2L.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
[...]
Reviewed-by: Sergey Shtylyov <redacted>
Just a little bit of change needed...
[...]
I think we should do that like sh_eth.c:
ravb_modify(ndev, ECMR, ECMR_DM, priv->duplex > 0 ? ECMR_DM : 0);
I have prepared a patch with this changes and also renamed the function "ravb_set_duplex_rgeth" to " ravb_set_duplex_gbeth"
As you suggested.
Regards,
Biju
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:08:58
Initialize GbEthernet E-MAC found on RZ/G2L SoC.
This patch also renames ravb_set_rate to ravb_set_rate_rcar and
ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with
the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 15 ++++--
drivers/net/ethernet/renesas/ravb_main.c | 64 +++++++++++++++++++-----
2 files changed, 62 insertions(+), 17 deletions(-)
@@ -204,6 +204,7 @@ enum ravb_reg {TLFRCR=0x0758,RFCR=0x0760,MAFCR=0x0778,+CSR0=0x0800,/* Documented for RZ/G2L only */};
@@ -814,10 +815,11 @@ enum ECMR_BIT {ECMR_TXF=0x00010000,/* Documented for R-Car Gen3 only */ECMR_RXF=0x00020000,ECMR_PFR=0x00040000,-ECMR_ZPF=0x00080000,/* Documented for R-Car Gen3 only */+ECMR_ZPF=0x00080000,/* Documented for R-Car Gen3 and RZ/G2L */ECMR_RZPF=0x00100000,ECMR_DPAD=0x00200000,ECMR_RCSC=0x00800000,+ECMR_RCPT=0x02000000,/* Documented for RZ/G2L only */ECMR_TRCCM=0x04000000,};
Initialize GbEthernet E-MAC found on RZ/G2L SoC.
This patch also renames ravb_set_rate to ravb_set_rate_rcar and
ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with
the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 15 ++++--
drivers/net/ethernet/renesas/ravb_main.c | 64 +++++++++++++++++++-----
2 files changed, 62 insertions(+), 17 deletions(-)
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-25 06:39:03
Hi Sergei,
Thanks for the feedback.
Subject: Re: [RFC/PATCH 10/18] ravb: Initialize GbEthernet E-MAC
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
Initialize GbEthernet E-MAC found on RZ/G2L SoC.
This patch also renames ravb_set_rate to ravb_set_rate_rcar and
ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with the
naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 15 ++++--
drivers/net/ethernet/renesas/ravb_main.c | 64
+++++++++++++++++++-----
2 files changed, 62 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index 7f68f9b8349c..7532cb51d7b8 100644
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-23 14:09:01
R-Car AVB-DMAC has Maximum 2K size on RZ buffer.
We need to Allow for changing the MTU within the
limit of the maximum size of a descriptor (2048 bytes).
Add a rx_2k_buffers hw feature bit to struct ravb_hw_info
to add this constraint only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
R-Car AVB-DMAC has Maximum 2K size on RZ buffer.
We need to Allow for changing the MTU within the
limit of the maximum size of a descriptor (2048 bytes).
Add a rx_2k_buffers hw feature bit to struct ravb_hw_info
to add this constraint only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
From: Biju Das <biju.das.jz@bp.renesas.com> Date: 2021-09-26 15:48:17
Hi Sergei,
Subject: Re: [RFC/PATCH 11/18] ravb: Add rx_2k_buffers to struct
ravb_hw_info
On 9/23/21 5:08 PM, Biju Das wrote:
quoted
R-Car AVB-DMAC has Maximum 2K size on RZ buffer.
We need to Allow for changing the MTU within the limit of the maximum
size of a descriptor (2048 bytes).
Add a rx_2k_buffers hw feature bit to struct ravb_hw_info to add this
constraint only for R-Car.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/net/ethernet/renesas/ravb.h | 1 +
drivers/net/ethernet/renesas/ravb_main.c | 8 ++++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/renesas/ravb.h
b/drivers/net/ethernet/renesas/ravb.h
index 7532cb51d7b8..ab4909244276 100644
@@ -1765,28 +1777,30 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)desc->dptr=cpu_to_le32(dma_addr);/* TX timestamp required */-if(q==RAVB_NC){-ts_skb=kmalloc(sizeof(*ts_skb),GFP_ATOMIC);-if(!ts_skb){-if(num_tx_desc>1){-desc--;-dma_unmap_single(ndev->dev.parent,dma_addr,-len,DMA_TO_DEVICE);+if(info->timestamp){+if(q==RAVB_NC){+ts_skb=kmalloc(sizeof(*ts_skb),GFP_ATOMIC);+if(!ts_skb){+if(num_tx_desc>1){+desc--;+dma_unmap_single(ndev->dev.parent,dma_addr,+len,DMA_TO_DEVICE);+}+gotounmap;}-gotounmap;+ts_skb->skb=skb_get(skb);+ts_skb->tag=priv->ts_skb_tag++;+priv->ts_skb_tag&=0x3ff;+list_add_tail(&ts_skb->list,&priv->ts_skb_list);++/* TAG and timestamp required flag */+skb_shinfo(skb)->tx_flags|=SKBTX_IN_PROGRESS;+desc->tagh_tsr=(ts_skb->tag>>4)|TX_TSR;+desc->ds_tagl|=cpu_to_le16(ts_skb->tag<<12);}-ts_skb->skb=skb_get(skb);-ts_skb->tag=priv->ts_skb_tag++;-priv->ts_skb_tag&=0x3ff;-list_add_tail(&ts_skb->list,&priv->ts_skb_list);-/* TAG and timestamp required flag */-skb_shinfo(skb)->tx_flags|=SKBTX_IN_PROGRESS;-desc->tagh_tsr=(ts_skb->tag>>4)|TX_TSR;-desc->ds_tagl|=cpu_to_le16(ts_skb->tag<<12);+skb_tx_timestamp(skb);}--skb_tx_timestamp(skb);/* Descriptor type must be set after all the above writes */dma_wmb();if(num_tx_desc>1){
@@ -1897,10 +1911,12 @@ static int ravb_close(struct net_device *ndev)"device will be stopped after h/w processes are done.\n");/* Clear the timestamp list */-list_for_each_entry_safe(ts_skb,ts_skb2,&priv->ts_skb_list,list){-list_del(&ts_skb->list);-kfree_skb(ts_skb->skb);-kfree(ts_skb);+if(info->timestamp){+list_for_each_entry_safe(ts_skb,ts_skb2,&priv->ts_skb_list,list){+list_del(&ts_skb->list);+kfree_skb(ts_skb->skb);+kfree(ts_skb);+}}/* PHY disconnect */