Thread (209 messages) 209 messages, 18 authors, 2003-06-17

Re: Route cache performance under stress

From: Simon Kirby <hidden>
Date: 2003-06-09 06:52:11

Possibly related (same subject, not in this thread)

On Sun, Jun 08, 2003 at 11:03:32PM -0700, David S. Miller wrote:
   I'd love to test this out.. If it could do full gigabit line rate with
   random ips that would be soooooooo nice :>
Agreed. :)
It isn't impossible with the current design, that I am
quire sure of.

Here is a simple idea, make the routing cache miss case steal
an entry sitting at the end of the hash chain this new one will
map to.  It only steals entries which have not been recently used.
I just asked whether this was possible in a previous email, but you must
have missed it.  I am seeing a lot of memory management stuff in
profiles, so I think recycling routing cache entries (if only when the
table is full and the garbage collector would otherwise need to run)
would be very helpful.

Is it possible to get a good guess of what cache entry to recycle without
walking for a while or without some kind of LRU?
The big problem area on SMP is fib_validate_source.  I'm sure some
clear thinking can wipe that off the profiles too.
Not running the important stuff with SMP yet, so I don't care about this
at the moment. O:)

Simon-
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