Thread (209 messages) 209 messages, 18 authors, 2003-06-17

Re: Route cache performance under stress

From: Andi Kleen <hidden>
Date: 2003-06-11 07:25:19

Possibly related (same subject, not in this thread)

I have a strange feeling that Ralph's system isn't using
TSC and that's why it shows up so high on the profiles :-)
TSC do_gettimeofday() is REALLY cheap (TSC read plus a multiply which
x86 does in like 5 cycles).
On a P4 rdtsc takes 90+ cycles (probably because it's flushing the complete
pipeline). Of course it's still relatively fast if you run that at 3Ghz,
but on slower P4s it may hurt.

On Athlons/Hammers it is quite fast, but at least on Hammer it needs
a pipeline flush again for accuracy (otherwise the CPU can speculate
it around)

One bigger cost is normally the rw lock or the two memory barriers for
the seqlock (on 2.5). On a UP compiled kernel it should not be a problem
though.

-Andi
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