Re: [Qemu-ppc] [RFC PATCH 15/17] KVM: PPC64: bookehv: Add support for interrupt handling

2 files changed, 122 insertions(+), 10 deletions(-)
=20

diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h =

index 30a600f..8be6f87 100644

--- a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
+++ b/arch/powerpc/include/asm/kvm_booke_hv_asm.h

@@ -1,5 +1,5 @@

/*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2010-2012 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or =

 * it under the terms of the GNU General Public License, version 2, as

@@ -17,6 +17,7 @@
 * there are no exceptions for which we fall through directly to
 * the normal host handler.
 *
+ * 32-bit host
 * Expected inputs (normal exceptions):
 *   SCRATCH0 =3D saved r10
 *   r10 =3D thread struct

@@ -33,6 +34,15 @@
 *   *(r8 + GPR9) =3D saved r9
 *   *(r8 + GPR10) =3D saved r10 (r10 not yet clobbered)
 *   *(r8 + GPR11) =3D saved r11
+ *
+ * 64-bit host
+ * Expected inputs (exception types GEN/DBG/CRIT/MC):
+ *  r13 =3D PACA_POINTER
+ *  r10 =3D saved CR
+ *  SPRN_SPRG_##type##_SCRATCH =3D saved r13
+ *  *(r13 + PACA_EX##type + EX_R10) =3D saved r10
+ *  *(r13 + PACA_EX##type + EX_R11) =3D saved r11
+ * Only the bolted version of TLB miss exception handlers is =

 */
.macro DO_KVM intno srr1
#ifdef CONFIG_KVM_BOOKE_HV

diff --git a/arch/powerpc/kvm/bookehv_interrupts.S =

index dff8ed4..04097de 100644

--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S

@@ -12,10 +12,11 @@
 * along with this program; if not, write to the Free Software
 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  =

 *
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
 *
 * Author: Varun Sethi <varun.sethi@freescale.com>
 * Author: Scott Wood <scotwood@freescale.com>
+ * Author: Mihai Caraman <mihai.caraman@freescale.com>
 *
 * This file is derived from arch/powerpc/kvm/booke_interrupts.S
 */

@@ -30,7 +31,11 @@

#include <asm/bitsperlong.h>
#include <asm/thread_info.h>
=20
+#ifdef CONFIG_64BIT
+#include <asm/exception-64e.h>
+#else
#include "../kernel/head_booke.h" /* for THREAD_NORMSAVE() */
+#endif
=20
#define LONGBYTES		(BITS_PER_LONG / 8)
=20

@@ -38,20 +43,21 @@

#define VCPU_GUEST_SPRG(n)	(VCPU_GUEST_SPRGS + (n * LONGBYTES))
=20
/* The host stack layout: */
-#define HOST_R1         (0 * LONGBYTES) /* Implied by stwu. */
-#define HOST_CALLEE_LR  (1 * LONGBYTES)
-#define HOST_RUN        (2 * LONGBYTES) /* struct kvm_run */
+#define HOST_R1         0 /* Implied by stwu. */
+#define HOST_CALLEE_LR  PPC_LR_STKOFF
+#define HOST_RUN        (HOST_CALLEE_LR + LONGBYTES)
/*
 * r2 is special: it holds 'current', and it made nonvolatile in the
 * kernel with the -ffixed-r2 gcc option.
 */
-#define HOST_R2         (3 * LONGBYTES)
-#define HOST_CR         (4 * LONGBYTES)
-#define HOST_NV_GPRS    (5 * LONGBYTES)
+#define HOST_R2         (HOST_RUN + LONGBYTES)
+#define HOST_CR         (HOST_R2 + LONGBYTES)
+#define HOST_NV_GPRS    (HOST_CR + LONGBYTES)
#define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * LONGBYTES))
#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + LONGBYTES)
#define HOST_STACK_SIZE ((HOST_MIN_STACK_SIZE + 15) & ~15) /* Align. =

#define NEED_DEAR		0x00000002 /* save faulting DEAR */

@@ -202,6 +208,102 @@

	b	kvmppc_resume_host
.endm
=20
+#ifdef CONFIG_64BIT
+/*
+ * For input register values, see =