Re: [PATCH v3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
From: Artem Bityutskiy <dedekind1@gmail.com>
Date: 2011-08-22 10:51:26
On Thu, 2011-08-18 at 10:33 +0800, b35362@freescale.com wrote:
From: Liu Shuo <redacted> Freescale FCM controller has a 2K size limitation of buffer RAM. In order to support the Nand flash chip whose page size is larger than 2K bytes, we divide a page into multi-2K pages for MTD layer driver. In that case, we force to set the page size to 2K bytes. We convert the page address of MTD layer driver to a real page address in flash chips and a column index in fsl_elbc driver. We can issue any column address by UA instruction of elbc controller. NOTE: Due to there is a limitation of 'Number of Partial Program Cycles in the Same Page (NOP)', the flash chip which is supported by this workaround have to meet below conditions. 1. page size is not greater than 4KB 2. 1) if main area and spare area have independent NOPs: main area NOP : >=3 spare area NOP : >=2 2) if main area and spare area have a common NOP: NOP : >=4
Could you please also add this kind of info to the driver code comments?
Does it also make sense to print a message if you do the emulation,
like:
pr_info("attention! emulating 2KiB NAND pages!");
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Best Regards,
Artem Bityutskiy