On Thu, May 19, 2011 at 6:16 PM, Michael Neuling [off-list ref] wrote:

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On Thu, May 19, 2011 at 4:36 PM, Michael Neuling [off-list ref] wro=

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On Thu, May 19, 2011 at 12:58 AM, Michael Neuling [off-list ref]=

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Eric,

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This patch adds save/restore register support for the BlueGene/P
double hummer FPU.

What does this mean? =3D3DA0Needs more details here.

okay, I've changed it a bit in [V2], if you want more I can do my best.

If you can describe the whole primary and secondary registers that'd be
cool. =A0ASCII art would be awesome! :-)

You sure you don't just want a bitfield.conf? :)  I'll do my best, but my
ASCII art isn't what it used to be.  I'll also include a reference to the P=
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Ok, sounds like there is 32*8*2 bytes of data, rather than the normal
32*8 bytes for FP only (ignoring VSX). =3DA0If this is the case, then =

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need make 'fpr' in the thread struct bigger which you can do by settin=

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TS_FPRWIDTH =3D3D 2 like we do for VSX.

Okay - so basically what I have now and TS_FPRWIDTH=3D2 ?

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Since it isn't available on other chips, shoudl it just be PPC_BGP_FPU
or PPC_BGP_DOUBLE_FPU?

I'd probably still prefer it disassociated with the CPU name, but we are
really bike shedding here. =A0I'm not too fussed.

I'll leave it separate and switch it to PPC_FP2 (or would you prefer
PPC_FP2_FPU to make it clear) since the public PDF refers to it this way.

If that all sounds good, I'll spin [V3] tomorrow.

     -eric