On Fri, May 08, 2020 at 06:36:09PM +0100, Mark Brown wrote:

On Fri, May 08, 2020 at 04:29:25PM +0300, Serge Semin wrote:

quoted

Baikal-T1 SoC provides DW DMA controller to perform low-speed peripherals
Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
APB SSI devices embedded into the SoC. Currently this type DMA device is

This basically all looks good to me (without any hardware specific
knowledge), I had a few comments but they were mostly procedural ones -
mainly getting these bug fixes you've done merged as such.  Nice work.

Thanks. I'll address the Andy's comments and send v2 after that.

-Sergey