Thread (108 messages) 108 messages, 8 authors, 2015-01-13

Re: [PATCH RFC 01/67] MIPS: Add generic QEMU R6 PRid and cpu type identifiers

From: David Daney <hidden>
Date: 2014-12-18 19:11:03

On 12/18/2014 07:09 AM, Markos Chandras wrote:
quoted hunk ↗ jump to hunk
From: Leonid Yegoshin <redacted>

Latest versions of QEMU added support for mips32r6-generic and
mips64r6-generic cpu types so add related definitions in preparation
of MIPS R6 support.

Signed-off-by: Leonid Yegoshin <redacted>
Signed-off-by: Markos Chandras <redacted>
---
  arch/mips/include/asm/cpu.h | 3 +++
  1 file changed, 3 insertions(+)
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index dfdc77ed1839..23a5dbc0ee06 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -93,6 +93,7 @@
   * These are the PRID's for when 23:16 == PRID_COMP_MIPS
   */

+#define PRID_IMP_QEMUR6		0x0000
Why not have a value for a real R6 CPU, and then have QEMU emulate that?

quoted hunk ↗ jump to hunk
  #define PRID_IMP_4KC		0x8000
  #define PRID_IMP_5KC		0x8100
  #define PRID_IMP_20KC		0x8200
@@ -311,6 +312,8 @@ enum cpu_type_enum {
  	CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
  	CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,

+	CPU_QEMUR6,
+
  	CPU_LAST
  };
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