Thread (69 messages) 69 messages, 5 authors, 2019-02-18

Re: [PATCHv3 08/27] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions

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From: Subrahmanya Lingappa <hidden>
Date: 2019-02-05 06:05:54
Also in: linux-arm-kernel, linux-pci, lkml

Reviewed-by: Subrahmanya Lingappa <redacted>

On Tue, Jan 29, 2019 at 1:39 PM Z.q. Hou [off-list ref] wrote:
quoted hunk ↗ jump to hunk
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

The inbound windows have different register set with outbound windows.
This patch change the MEM inbound window to the first one.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
---
V3:
 - No change

 drivers/pci/controller/pcie-mobiveil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index df71c11b4810..e88afc792a5c 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -616,7 +616,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
                           CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res));

        /* memory inbound translation window */
-       program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
+       program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);

        /* Get the I/O and memory ranges from DT */
        resource_list_for_each_entry(win, &pcie->resources) {
--
2.17.1
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