Thread (69 messages) 69 messages, 5 authors, 2019-02-18

Re: [PATCHv3 05/27] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows

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From: Subrahmanya Lingappa <hidden>
Date: 2019-02-05 06:04:26
Also in: linux-arm-kernel, linux-pci, lkml

Reviewed-by: Subrahmanya Lingappa <redacted>

On Tue, Jan 29, 2019 at 1:39 PM Z.q. Hou [off-list ref] wrote:
quoted hunk ↗ jump to hunk
From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

It should get PCI base address from the DT node property 'ranges'
to setup MEM/IO outbound windows instead of always zero.

Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge
IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
---
V3:
 - No change

 drivers/pci/controller/pcie-mobiveil.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a0dd337c6214..8ff873023b5f 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -630,8 +630,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)

                /* configure outbound translation window */
                program_ob_windows(pcie, pcie->ob_wins_configured,
-                                  win->res->start, 0, type,
-                                  resource_size(win->res));
+                                  win->res->start,
+                                  win->res->start - win->offset,
+                                  type, resource_size(win->res));
        }

        /* setup MSI hardware registers */
--
2.17.1
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