[PATCH v3 09/12] arm64: dts: exynos: gs101: enable cmu-peric0 clock controller
From: Tudor Ambarus <tudor.ambarus@linaro.org>
Date: 2024-01-09 12:58:43
Also in:
linux-clk, linux-devicetree, linux-i2c, linux-samsung-soc, linux-serial, lkml
Subsystem:
arm/samsung s3c, s5p and exynos arm architectures, google tensor soc support, the rest · Maintainers:
Krzysztof Kozlowski, Peter Griffin, Linus Torvalds
Enable the cmu-peric0 clock controller. It feeds USI and I3c. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- v3: - comply with the renamed cmu_peric0 clock names, "bus" and "ip" - collect Peter's R-b tag v2: collect Sam's R-b tag arch/arm64/boot/dts/exynos/google/gs101.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 4e5f4c748906..2d1344a202a9 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi@@ -339,6 +339,16 @@ ppi_cluster2: interrupt-partition-2 { }; }; + cmu_peric0: clock-controller@10800000 { + compatible = "google,gs101-cmu-peric0"; + reg = <0x10800000 0x4000>; + #clock-cells = <1>; + clocks = <&ext_24_5m>, + <&cmu_top CLK_DOUT_CMU_PERIC0_BUS>, + <&cmu_top CLK_DOUT_CMU_PERIC0_IP>; + clock-names = "oscclk", "bus", "ip"; + }; + sysreg_peric0: syscon@10820000 { compatible = "google,gs101-peric0-sysreg", "syscon"; reg = <0x10820000 0x10000>;
--
2.43.0.472.g3155946c3a-goog
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