[PATCH v3 08/12] arm64: dts: exynos: gs101: remove reg-io-width from serial
From: Tudor Ambarus <tudor.ambarus@linaro.org>
Date: 2024-01-09 12:58:41
Also in:
linux-clk, linux-devicetree, linux-i2c, linux-samsung-soc, linux-serial, lkml
Subsystem:
arm/samsung s3c, s5p and exynos arm architectures, google tensor soc support, the rest · Maintainers:
Krzysztof Kozlowski, Peter Griffin, Linus Torvalds
Remove the reg-io-width property in order to comply with the bindings. The entire bus (PERIC) on which the GS101 serial resides only allows 32-bit register accesses. The reg-io-width dt property is disallowed for the "google,gs101-uart" compatible and instead the iotype is inferred from the compatible. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- v3: collect Peter's R-b tag v2: new patch arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index d838e3a7af6e..4e5f4c748906 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi@@ -366,7 +366,6 @@ usi_uart: usi@10a000c0 { serial_0: serial@10a00000 { compatible = "google,gs101-uart"; reg = <0x10a00000 0xc0>; - reg-io-width = <4>; interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&dummy_clk 0>, <&dummy_clk 0>;
--
2.43.0.472.g3155946c3a-goog
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