From: Barry Song <hidden> Date: 2021-09-24 08:51:40
From: Barry Song <redacted>
ARM64 machines like kunpeng920 and x86 machines like Jacobsville have a
level of hardware topology in which some CPU cores, typically 4 cores,
share L3 tags or L2 cache.
That means spreading those tasks between clusters will bring more memory
bandwidth and decrease cache contention. But packing tasks might help
decrease the latency of cache synchronization.
We have three series to bring up cluster level scheduler in kernel.
This is the first series.
1st series(this one): make kernel aware of cluster, expose cluster to sysfs
ABI and add SCHED_CLUSTER which can make load balance between clusters to
benefit lots of workload.
Testing shows this can hugely boost the performance, for example, this
can increase 25.1% of SPECrate mcf on Jacobsville and 13.574% of mcf
on kunpeng920.
2nd series(wake_affine): modify the wake_affine and let kernel select CPUs
within cluster first before scanning the whole LLC so that we can benefit
from the lower latency of cache coherence within one single cluster. This
series is much more tricky. so we would like to send it after we build
the base of cluster by the 1st series. Prototype for 2nd series is here:
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-June/000219.html
3rd series: a sysctl to permit users to enable or disable cluster scheduler
from Tim Chen. Prototype here:
Add run time sysctl to enable/disable cluster scheduling
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-July/000258.html
This series is resent and rebased on 5.15-rc2.
-V1:
differences with RFC v6
* removed wake_affine path modifcation, which will be separately second series
* cluster_id is gotten by detecting valid ID before falling back to use offset
* lots of benchmark data from both x86 Jacobsville and ARM64 kunpeng920
-RFC v6:
https://lore.kernel.org/lkml/20210420001844.9116-1-song.bao.hua@hisilicon.com/
Barry Song (1):
scheduler: Add cluster scheduler level in core and related Kconfig for
ARM64
Jonathan Cameron (1):
topology: Represent clusters of CPUs within a die
Tim Chen (1):
scheduler: Add cluster scheduler level for x86
Documentation/ABI/stable/sysfs-devices-system-cpu | 15 +++++
Documentation/admin-guide/cputopology.rst | 12 ++--
arch/arm64/Kconfig | 7 +++
arch/arm64/kernel/topology.c | 2 +
arch/x86/Kconfig | 8 +++
arch/x86/include/asm/smp.h | 7 +++
arch/x86/include/asm/topology.h | 3 +
arch/x86/kernel/cpu/cacheinfo.c | 1 +
arch/x86/kernel/cpu/common.c | 3 +
arch/x86/kernel/smpboot.c | 44 ++++++++++++++-
drivers/acpi/pptt.c | 67 +++++++++++++++++++++++
drivers/base/arch_topology.c | 14 +++++
drivers/base/topology.c | 10 ++++
include/linux/acpi.h | 5 ++
include/linux/arch_topology.h | 5 ++
include/linux/sched/topology.h | 7 +++
include/linux/topology.h | 13 +++++
kernel/sched/topology.c | 5 ++
18 files changed, 223 insertions(+), 5 deletions(-)
--
1.8.3.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
From: Barry Song <hidden> Date: 2021-09-24 08:52:00
From: Jonathan Cameron <redacted>
Both ACPI and DT provide the ability to describe additional layers of
topology between that of individual cores and higher level constructs
such as the level at which the last level cache is shared.
In ACPI this can be represented in PPTT as a Processor Hierarchy
Node Structure [1] that is the parent of the CPU cores and in turn
has a parent Processor Hierarchy Nodes Structure representing
a higher level of topology.
For example Kunpeng 920 has 6 or 8 clusters in each NUMA node, and each
cluster has 4 cpus. All clusters share L3 cache data, but each cluster
has local L3 tag. On the other hand, each clusters will share some
internal system bus.
+-----------------------------------+ +---------+
| +------+ +------+ +---------------------------+ |
| | CPU0 | | cpu1 | | +-----------+ | |
| +------+ +------+ | | | | |
| +----+ L3 | | |
| +------+ +------+ cluster | | tag | | |
| | CPU2 | | CPU3 | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +----+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | L3 |
| data |
+-----------------------------------+ | |
| +------+ +------+ | +-----------+ | |
| | | | | | | | | |
| +------+ +------+ +----+ L3 | | |
| | | tag | | |
| +------+ +------+ | | | | |
| | | | | ++ +-----------+ | |
| +------+ +------+ |---------------------------+ |
+-----------------------------------| | |
+-----------------------------------| | |
| +------+ +------+ +---------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| +----+ L3 | | |
| +------+ +------+ | | tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ | |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +---+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | | |
+-----------------------------------+ | |
+-----------------------------------+ ++ |
| +------+ +------+ +--------------------------+ |
| | | | | | +-----------+ | |
| +------+ +------+ | | | | |
| | | L3 | | |
| +------+ +------+ +--+ tag | | |
| | | | | | | | | |
| +------+ +------+ | +-----------+ | |
| | +---------+
+-----------------------------------+
That means spreading tasks among clusters will bring more bandwidth
while packing tasks within one cluster will lead to smaller cache
synchronization latency. So both kernel and userspace will have
a chance to leverage this topology to deploy tasks accordingly to
achieve either smaller cache latency within one cluster or an even
distribution of load among clusters for higher throughput.
This patch exposes cluster topology to both kernel and userspace.
Libraried like hwloc will know cluster by cluster_cpus and related
sysfs attributes. PoC of HWLOC support at [2].
Note this patch only handle the ACPI case.
Special consideration is needed for SMT processors, where it is
necessary to move 2 levels up the hierarchy from the leaf nodes
(thus skipping the processor core level).
Note that arm64 / ACPI does not provide any means of identifying
a die level in the topology but that may be unrelate to the cluster
level.
[1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node
structure (Type 0)
[2] https://github.com/hisilicon/hwloc/tree/linux-cluster
Signed-off-by: Jonathan Cameron <redacted>
Signed-off-by: Tian Tao <tiantao6@hisilicon.com>
Signed-off-by: Barry Song <redacted>
---
Documentation/ABI/stable/sysfs-devices-system-cpu | 15 +++++
Documentation/admin-guide/cputopology.rst | 12 ++--
arch/arm64/kernel/topology.c | 2 +
drivers/acpi/pptt.c | 67 +++++++++++++++++++++++
drivers/base/arch_topology.c | 14 +++++
drivers/base/topology.c | 10 ++++
include/linux/acpi.h | 5 ++
include/linux/arch_topology.h | 5 ++
include/linux/topology.h | 6 ++
9 files changed, 132 insertions(+), 4 deletions(-)
@@ -42,6 +42,12 @@ Description: the CPU core ID of cpuX. Typically it is the hardware platform's architecture and platform dependent. Values: integer+What: /sys/devices/system/cpu/cpuX/topology/cluster_id+Description: the cluster ID of cpuX. Typically it is the hardware platform's+ identifier (rather than the kernel's). The actual value is+ architecture and platform dependent.+Values: integer+ What: /sys/devices/system/cpu/cpuX/topology/book_id Description: the book ID of cpuX. Typically it is the hardware platform's identifier (rather than the kernel's). The actual value is
@@ -85,6 +91,15 @@ Description: human-readable list of CPUs within the same die. The format is like 0-3, 8-11, 14,17. Values: decimal list.+What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus+Description: internal kernel map of CPUs within the same cluster.+Values: hexadecimal bitmask.++What: /sys/devices/system/cpu/cpuX/topology/cluster_cpus_list+Description: human-readable list of CPUs within the same cluster.+ The format is like 0-3, 8-11, 14,17.+Values: decimal list.+ What: /sys/devices/system/cpu/cpuX/topology/book_siblings Description: internal kernel map of cpuX's hardware threads within the same book_id. it's only used on s390.
@@ -39,10 +41,12 @@ not defined by include/asm-XXX/topology.h:1) topology_physical_package_id: -12) topology_die_id: -1-3) topology_core_id: 0-4) topology_sibling_cpumask: just the given CPU-5) topology_core_cpumask: just the given CPU-6) topology_die_cpumask: just the given CPU+3) topology_cluster_id: -1+4) topology_core_id: 0+5) topology_sibling_cpumask: just the given CPU+6) topology_core_cpumask: just the given CPU+7) topology_cluster_cpumask: just the given CPU+8) topology_die_cpumask: just the given CPU For architectures that don't support books (CONFIG_SCHED_BOOK) there are no default definitions for topology_book_id() and topology_book_cpumask().
@@ -747,6 +747,73 @@ int find_acpi_cpu_topology_package(unsigned int cpu)}/**+*find_acpi_cpu_topology_cluster()-DetermineauniqueCPUclustervalue+*@cpu:KernellogicalCPUnumber+*+*DetermineatopologyuniqueclusterIDforthegivenCPU/thread.+*ThisIDcanthenbeusedtogrouppeers,whichwillhavematchingids.+*+*Thecluster,ifpresentistheleveloftopologyaboveCPUs.Ina+*multi-threadCPU,itwillbethelevelabovetheCPU,notthethread.+*ItmaynotexistinsingleCPUsystems.Insimplemulti-CPUsystems,+*itmaybeequaltothepackagetopologylevel.+*+*Return:-ENOENTifthePPTTdoesn'texist,theCPUcannotbefound+*orthereisnotoplogylevelabovetheCPU..+*OtherwisereturnsavaluewhichrepresentsthepackageforthisCPU.+*/++intfind_acpi_cpu_topology_cluster(unsignedintcpu)+{+structacpi_table_header*table;+acpi_statusstatus;+structacpi_pptt_processor*cpu_node,*cluster_node;+u32acpi_cpu_id;+intretval;+intis_thread;++status=acpi_get_table(ACPI_SIG_PPTT,0,&table);+if(ACPI_FAILURE(status)){+acpi_pptt_warn_missing();+return-ENOENT;+}++acpi_cpu_id=get_acpi_id_for_cpu(cpu);+cpu_node=acpi_find_processor_node(table,acpi_cpu_id);+if(cpu_node==NULL||!cpu_node->parent){+retval=-ENOENT;+gotoput_table;+}++is_thread=cpu_node->flags&ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD;+cluster_node=fetch_pptt_node(table,cpu_node->parent);+if(cluster_node==NULL){+retval=-ENOENT;+gotoput_table;+}+if(is_thread){+if(!cluster_node->parent){+retval=-ENOENT;+gotoput_table;+}+cluster_node=fetch_pptt_node(table,cluster_node->parent);+if(cluster_node==NULL){+retval=-ENOENT;+gotoput_table;+}+}+if(cluster_node->flags&ACPI_PPTT_ACPI_PROCESSOR_ID_VALID)+retval=cluster_node->acpi_processor_id;+else+retval=ACPI_PTR_DIFF(cluster_node,table);++put_table:+acpi_put_table(table);++returnretval;+}++/***find_acpi_cpu_topology_hetero_id()-Getacorearchitecturetag*@cpu:KernellogicalCPUnumber*
@@ -1353,6 +1353,7 @@ static inline int lpit_read_residency_count_address(u64 *address)#ifdef CONFIG_ACPI_PPTTintacpi_pptt_cpu_is_thread(unsignedintcpu);intfind_acpi_cpu_topology(unsignedintcpu,intlevel);+intfind_acpi_cpu_topology_cluster(unsignedintcpu);intfind_acpi_cpu_topology_package(unsignedintcpu);intfind_acpi_cpu_topology_hetero_id(unsignedintcpu);intfind_acpi_cpu_cache_topology(unsignedintcpu,intlevel);
@@ -1365,6 +1366,10 @@ static inline int find_acpi_cpu_topology(unsigned int cpu, int level){return-EINVAL;}+staticinlineintfind_acpi_cpu_topology_cluster(unsignedintcpu)+{+return-EINVAL;+}staticinlineintfind_acpi_cpu_topology_package(unsignedintcpu){return-EINVAL;
From: Barry Song <hidden> Date: 2021-09-24 08:52:19
From: Tim Chen <redacted>
There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce is
shared among a cluster of cores instead of being exclusive to one
single core.
To prevent oversubscription of L2 cache, load should be balanced
between such L2 clusters, especially for tasks with no shared data.
On benchmark such as SPECrate mcf test, this change provides a
boost to performance especially on medium load system on Jacobsville.
on a Jacobsville that has 24 Atom cores, arranged into 6 clusters
of 4 cores each, the benchmark number is as follow:
Improvement over baseline kernel for mcf_r
copies run time base rate
1 -0.1% -0.2%
6 25.1% 25.1%
12 18.8% 19.0%
24 0.3% 0.3%
So this looks pretty good. In terms of the system's task distribution,
some pretty bad clumping can be seen for the vanilla kernel without
the L2 cluster domain for the 6 and 12 copies case. With the extra
domain for cluster, the load does get evened out between the clusters.
Note this patch isn't an universal win as spreading isn't necessarily
a win, particually for those workload who can benefit from packing.
Signed-off-by: Tim Chen <redacted>
Signed-off-by: Barry Song <redacted>
---
arch/x86/Kconfig | 8 ++++++++
arch/x86/include/asm/smp.h | 7 +++++++
arch/x86/include/asm/topology.h | 3 +++
arch/x86/kernel/cpu/cacheinfo.c | 1 +
arch/x86/kernel/cpu/common.c | 3 +++
arch/x86/kernel/smpboot.c | 44 ++++++++++++++++++++++++++++++++++++++++-
6 files changed, 65 insertions(+), 1 deletion(-)
@@ -85,6 +85,9 @@ u16 get_llc_id(unsigned int cpu)}EXPORT_SYMBOL_GPL(get_llc_id);+/* L2 cache ID of each logical CPU */+DEFINE_PER_CPU_READ_MOSTLY(u16,cpu_l2c_id)=BAD_APICID;+/* correctly size the local cpu masks */void__initsetup_cpu_local_masks(void){
@@ -101,6 +101,8 @@DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t,cpu_llc_shared_map);+DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t,cpu_l2c_shared_map);+/* Per CPU bogomips and other parameters */DEFINE_PER_CPU_READ_MOSTLY(structcpuinfo_x86,cpu_info);EXPORT_PER_CPU_SYMBOL(cpu_info);
@@ -464,6 +466,21 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)returnfalse;}+staticboolmatch_l2c(structcpuinfo_x86*c,structcpuinfo_x86*o)+{+intcpu1=c->cpu_index,cpu2=o->cpu_index;++/* Do not match if we do not have a valid APICID for cpu: */+if(per_cpu(cpu_l2c_id,cpu1)==BAD_APICID)+returnfalse;++/* Do not match if L2 cache id does not match: */+if(per_cpu(cpu_l2c_id,cpu1)!=per_cpu(cpu_l2c_id,cpu2))+returnfalse;++returntopology_sane(c,o,"l2c");+}+/**Unliketheotherlevels,wedonotenforcekeepinga*multicoregroupinsideaNUMAnode.Ifthishappens,wewill
From: Barry Song <hidden> Date: 2021-10-01 10:32:39
Hi Vincent, Dietmar, Peter, Ingo,
Do you have any comment on this first series which exposes cluster topology
of ARM64 kunpeng 920 & x86 Jacobsville and supports load balance only for
the 1st stage?
I will be very grateful for your comments so that things can move forward in the
right direction. I think Tim also looks forward to bringing up cluster
support in
Jacobsville.
Best Regards
Barry
On Fri, Sep 24, 2021 at 8:51 PM Barry Song [off-list ref] wrote:
From: Barry Song <redacted>
ARM64 machines like kunpeng920 and x86 machines like Jacobsville have a
level of hardware topology in which some CPU cores, typically 4 cores,
share L3 tags or L2 cache.
That means spreading those tasks between clusters will bring more memory
bandwidth and decrease cache contention. But packing tasks might help
decrease the latency of cache synchronization.
We have three series to bring up cluster level scheduler in kernel.
This is the first series.
1st series(this one): make kernel aware of cluster, expose cluster to sysfs
ABI and add SCHED_CLUSTER which can make load balance between clusters to
benefit lots of workload.
Testing shows this can hugely boost the performance, for example, this
can increase 25.1% of SPECrate mcf on Jacobsville and 13.574% of mcf
on kunpeng920.
2nd series(wake_affine): modify the wake_affine and let kernel select CPUs
within cluster first before scanning the whole LLC so that we can benefit
from the lower latency of cache coherence within one single cluster. This
series is much more tricky. so we would like to send it after we build
the base of cluster by the 1st series. Prototype for 2nd series is here:
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-June/000219.html
3rd series: a sysctl to permit users to enable or disable cluster scheduler
from Tim Chen. Prototype here:
Add run time sysctl to enable/disable cluster scheduling
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-July/000258.html
This series is resent and rebased on 5.15-rc2.
-V1:
differences with RFC v6
* removed wake_affine path modifcation, which will be separately second series
* cluster_id is gotten by detecting valid ID before falling back to use offset
* lots of benchmark data from both x86 Jacobsville and ARM64 kunpeng920
-RFC v6:
https://lore.kernel.org/lkml/20210420001844.9116-1-song.bao.hua@hisilicon.com/
Barry Song (1):
scheduler: Add cluster scheduler level in core and related Kconfig for
ARM64
Jonathan Cameron (1):
topology: Represent clusters of CPUs within a die
Tim Chen (1):
scheduler: Add cluster scheduler level for x86
Documentation/ABI/stable/sysfs-devices-system-cpu | 15 +++++
Documentation/admin-guide/cputopology.rst | 12 ++--
arch/arm64/Kconfig | 7 +++
arch/arm64/kernel/topology.c | 2 +
arch/x86/Kconfig | 8 +++
arch/x86/include/asm/smp.h | 7 +++
arch/x86/include/asm/topology.h | 3 +
arch/x86/kernel/cpu/cacheinfo.c | 1 +
arch/x86/kernel/cpu/common.c | 3 +
arch/x86/kernel/smpboot.c | 44 ++++++++++++++-
drivers/acpi/pptt.c | 67 +++++++++++++++++++++++
drivers/base/arch_topology.c | 14 +++++
drivers/base/topology.c | 10 ++++
include/linux/acpi.h | 5 ++
include/linux/arch_topology.h | 5 ++
include/linux/sched/topology.h | 7 +++
include/linux/topology.h | 13 +++++
kernel/sched/topology.c | 5 ++
18 files changed, 223 insertions(+), 5 deletions(-)
--
1.8.3.1
From: Vincent Guittot <vincent.guittot@linaro.org> Date: 2021-10-01 10:40:12
Hi Barry,
On Fri, 1 Oct 2021 at 12:32, Barry Song [off-list ref] wrote:
Hi Vincent, Dietmar, Peter, Ingo,
Do you have any comment on this first series which exposes cluster topology
of ARM64 kunpeng 920 & x86 Jacobsville and supports load balance only for
the 1st stage?
I will be very grateful for your comments so that things can move forward in the
right direction. I think Tim also looks forward to bringing up cluster
support in
Jacobsville.
This patchset makes sense to me and the addition of a new scheduling
level to better reflect the HW topology goes in the right direction.
Best Regards
Barry
On Fri, Sep 24, 2021 at 8:51 PM Barry Song [off-list ref] wrote:
quoted
From: Barry Song <redacted>
ARM64 machines like kunpeng920 and x86 machines like Jacobsville have a
level of hardware topology in which some CPU cores, typically 4 cores,
share L3 tags or L2 cache.
That means spreading those tasks between clusters will bring more memory
bandwidth and decrease cache contention. But packing tasks might help
decrease the latency of cache synchronization.
We have three series to bring up cluster level scheduler in kernel.
This is the first series.
1st series(this one): make kernel aware of cluster, expose cluster to sysfs
ABI and add SCHED_CLUSTER which can make load balance between clusters to
benefit lots of workload.
Testing shows this can hugely boost the performance, for example, this
can increase 25.1% of SPECrate mcf on Jacobsville and 13.574% of mcf
on kunpeng920.
2nd series(wake_affine): modify the wake_affine and let kernel select CPUs
within cluster first before scanning the whole LLC so that we can benefit
from the lower latency of cache coherence within one single cluster. This
series is much more tricky. so we would like to send it after we build
the base of cluster by the 1st series. Prototype for 2nd series is here:
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-June/000219.html
3rd series: a sysctl to permit users to enable or disable cluster scheduler
from Tim Chen. Prototype here:
Add run time sysctl to enable/disable cluster scheduling
https://op-lists.linaro.org/pipermail/linaro-open-discussions/2021-July/000258.html
This series is resent and rebased on 5.15-rc2.
-V1:
differences with RFC v6
* removed wake_affine path modifcation, which will be separately second series
* cluster_id is gotten by detecting valid ID before falling back to use offset
* lots of benchmark data from both x86 Jacobsville and ARM64 kunpeng920
-RFC v6:
https://lore.kernel.org/lkml/20210420001844.9116-1-song.bao.hua@hisilicon.com/
Barry Song (1):
scheduler: Add cluster scheduler level in core and related Kconfig for
ARM64
Jonathan Cameron (1):
topology: Represent clusters of CPUs within a die
Tim Chen (1):
scheduler: Add cluster scheduler level for x86
Documentation/ABI/stable/sysfs-devices-system-cpu | 15 +++++
Documentation/admin-guide/cputopology.rst | 12 ++--
arch/arm64/Kconfig | 7 +++
arch/arm64/kernel/topology.c | 2 +
arch/x86/Kconfig | 8 +++
arch/x86/include/asm/smp.h | 7 +++
arch/x86/include/asm/topology.h | 3 +
arch/x86/kernel/cpu/cacheinfo.c | 1 +
arch/x86/kernel/cpu/common.c | 3 +
arch/x86/kernel/smpboot.c | 44 ++++++++++++++-
drivers/acpi/pptt.c | 67 +++++++++++++++++++++++
drivers/base/arch_topology.c | 14 +++++
drivers/base/topology.c | 10 ++++
include/linux/acpi.h | 5 ++
include/linux/arch_topology.h | 5 ++
include/linux/sched/topology.h | 7 +++
include/linux/topology.h | 13 +++++
kernel/sched/topology.c | 5 ++
18 files changed, 223 insertions(+), 5 deletions(-)
--
1.8.3.1
From: Peter Zijlstra <peterz@infradead.org> Date: 2021-10-01 14:58:11
On Fri, Oct 01, 2021 at 12:39:56PM +0200, Vincent Guittot wrote:
Hi Barry,
On Fri, 1 Oct 2021 at 12:32, Barry Song [off-list ref] wrote:
quoted
Hi Vincent, Dietmar, Peter, Ingo,
Do you have any comment on this first series which exposes cluster topology
of ARM64 kunpeng 920 & x86 Jacobsville and supports load balance only for
the 1st stage?
I will be very grateful for your comments so that things can move forward in the
right direction. I think Tim also looks forward to bringing up cluster
support in
Jacobsville.
This patchset makes sense to me and the addition of a new scheduling
level to better reflect the HW topology goes in the right direction.
So I had a look, dreading the selecti-idle-sibling changes, and was
pleasantly surprised they're gone :-)
As is, this does indeed look like something mergable without too much
hassle.
The one questino I have is, do we want default y?
The one nit I have is the Kconfig text, I'm not really sure that's
clarifying what a cluster is.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
On Fri, Oct 01, 2021 at 12:39:56PM +0200, Vincent Guittot wrote:
quoted
Hi Barry,
On Fri, 1 Oct 2021 at 12:32, Barry Song [off-list ref] wrote:
quoted
Hi Vincent, Dietmar, Peter, Ingo,
Do you have any comment on this first series which exposes
cluster topology
of ARM64 kunpeng 920 & x86 Jacobsville and supports load balance
only for
the 1st stage?
I will be very grateful for your comments so that things can move
forward in the
right direction. I think Tim also looks forward to bringing up
cluster
support in
Jacobsville.
This patchset makes sense to me and the addition of a new
scheduling
level to better reflect the HW topology goes in the right
direction.
So I had a look, dreading the selecti-idle-sibling changes, and was
pleasantly surprised they're gone :-)
As is, this does indeed look like something mergable without too much
hassle.
The one questino I have is, do we want default y?
I also agree that default y is preferable.
The one nit I have is the Kconfig text, I'm not really sure that's
clarifying what a cluster is.
Do you have a preference of a different name other than cluster?
Or simply better documentation on what a cluster is for ARM64
and x86 in Kconfig?
Thanks.
Tim
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
From: Barry Song <hidden> Date: 2021-10-02 07:10:15
On Sat, Oct 2, 2021 at 12:22 PM Tim Chen [off-list ref] wrote:
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
quoted
On Fri, Oct 01, 2021 at 12:39:56PM +0200, Vincent Guittot wrote:
quoted
Hi Barry,
On Fri, 1 Oct 2021 at 12:32, Barry Song [off-list ref] wrote:
quoted
Hi Vincent, Dietmar, Peter, Ingo,
Do you have any comment on this first series which exposes
cluster topology
of ARM64 kunpeng 920 & x86 Jacobsville and supports load balance
only for
the 1st stage?
I will be very grateful for your comments so that things can move
forward in the
right direction. I think Tim also looks forward to bringing up
cluster
support in
Jacobsville.
This patchset makes sense to me and the addition of a new
scheduling
level to better reflect the HW topology goes in the right
direction.
So I had a look, dreading the selecti-idle-sibling changes, and was
pleasantly surprised they're gone :-)
Thanks, Peter and Vincent for reviewing.
My tiny scheduler team is still hardly working on the
select-idle-sibling changes.
And that one will be sent as a separate series as an improvement to this series.
I promise the wake-affine series won't be that scary when you see it
next time :-)
quoted
As is, this does indeed look like something mergable without too much
hassle.
The one questino I have is, do we want default y?
I also agree that default y is preferable.
Thanks, Tim, for your comments.
I am ok to make it default "Y" for x86 after having a better doc as below:
This also aligns well with SCHED_MC and SCHED_SMT in arch/x86/kconfig:
config SCHED_MC
def_bool y
prompt "Multi-core scheduler support"
config SCHED_SMT
def_bool y if SMP
But ARM64 is running in a different tradition, arch/arm64/Kconfig has
SCHED_MC and SCHED_SMT as below:
config SCHED_MC
bool "Multi-core scheduler support"
help
...
config SCHED_SMT
bool "SMT scheduler support"
help
...
I don't want to be an odd man :-) So for ARM64, I vote keeping the
Kconfig file as is. And I am planning to modify arch/arm64/defconfig
in second patchset(select-idle-sibling) by adding
CONFIG_SCHED_CLUSTR=y
as load-balance plus wake-affine changes seem to make cluster
scheduler much more widely win on kunpeng920 while doing load-
balance only can sometimes hurt. so I don't mind holding "N" for
a while on the ARM64 platform.
quoted
The one nit I have is the Kconfig text, I'm not really sure that's
clarifying what a cluster is.
Do you have a preference of a different name other than cluster?
Or simply better documentation on what a cluster is for ARM64
and x86 in Kconfig?
Anyway, naming is really a hard thing. cluster seems not a bad name for
ARM SoCs as besides kunpeng, some other ARM SoCs are also using this
name in specifications, for example, neoverse-n1, phytium etc.
Will we use the same name between x86 and ARM and just refine the document
as below? Does the below doc explain what is "cluster" better?
decision
- making when dealing with machines that have clusters of CPUs
- sharing L2 cache. If unsure say N here.
+ making when dealing with machines that have clusters of
CPUs.
+ Cluster usually means a couple of CPUs which are placed
closely
+ by sharing mid-level caches, last-level cache tags or
internal
+ busses. For example, on x86 Jacobsville, each 4 CPUs share
one
+ L2 cache. This feature isn't a universal win because it can
bring
+ a cost of slightly increased overhead in some places. If
unsure
+ say N here.
This also aligns well with SCHED_MC and SCHED_SMT in
arch/x86/kconfig:
config SCHED_MC
def_bool y
prompt "Multi-core scheduler support"
config SCHED_SMT
def_bool y if SMP
But ARM64 is running in a different tradition, arch/arm64/Kconfig has
SCHED_MC and SCHED_SMT as below:
config SCHED_MC
bool "Multi-core scheduler support"
help
...
config SCHED_SMT
bool "SMT scheduler support"
help
...
Barry,
Found one minor fix to the x86 patch to take care of compile error for
!CONFIG_SMP.
Thanks.
Tim
From: Peter Zijlstra <peterz@infradead.org> Date: 2021-10-05 07:36:34
On Fri, Sep 24, 2021 at 08:51:03PM +1200, Barry Song wrote:
From: Barry Song <redacted>
Signed-off-by: Yicong Yang <redacted>
Signed-off-by: Barry Song <redacted>
That is not a valid SoB pattern. The first SoB should be the author, the
last SoB should be the one sending the patch, in this case both are
Barry. What's Yicong's contribution in all this?
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From: Peter Zijlstra <peterz@infradead.org> Date: 2021-10-05 07:52:47
On Fri, Oct 01, 2021 at 04:22:46PM -0700, Tim Chen wrote:
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
quoted
The one questino I have is, do we want default y?
I also agree that default y is preferable.
I'll change at least the x86 one to:
default y
depends on SMP
quoted
The one nit I have is the Kconfig text, I'm not really sure that's
clarifying what a cluster is.
Do you have a preference of a different name other than cluster?
Or simply better documentation on what a cluster is for ARM64
and x86 in Kconfig?
Yes, better wording as to what a cluster is. Currently the x86 and arm64
ones actually differ:
x86:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters of CPUs
sharing L2 cache. If unsure say N here.
arm64:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters(sharing internal
bus or sharing LLC cache tag). If unsure say N here.
(also, all this stuff being replicated across arch/*/Kconfig seems
unfortunate)
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This feature isn't a universal win because it can bring
+ a cost of slightly increased overhead in some places. If unsure
+ say N here.
That is a really odd addition to a default-y feature.
How about I make both:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters of CPUs.
Cluster usually means a couple of CPUs which are placed closely
by sharing mid-level caches, last-level cache tags or internal
busses.
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From: Barry Song <hidden> Date: 2021-10-05 09:01:34
On Tue, Oct 5, 2021 at 8:35 PM Peter Zijlstra [off-list ref] wrote:
On Fri, Sep 24, 2021 at 08:51:03PM +1200, Barry Song wrote:
quoted
From: Barry Song <redacted>
quoted
Signed-off-by: Yicong Yang <redacted>
Signed-off-by: Barry Song <redacted>
That is not a valid SoB pattern. The first SoB should be the author, the
last SoB should be the one sending the patch, in this case both are
Barry. What's Yicong's contribution in all this?
Yicong made the benchmarks of SPECrate and collected the result data which
is in the commit log. I am not quite sure what is the best tag for
him. Is Tested-by
appropriate in this case?
Thanks
barry
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This feature isn't a universal win because it can bring
quoted
+ a cost of slightly increased overhead in some places. If unsure
+ say N here.
That is a really odd addition to a default-y feature.
How about I make both:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters of CPUs.
Cluster usually means a couple of CPUs which are placed closely
by sharing mid-level caches, last-level cache tags or internal
busses.
From: Barry Song <hidden> Date: 2021-10-05 09:15:59
On Tue, Oct 5, 2021 at 8:50 PM Peter Zijlstra [off-list ref] wrote:
On Fri, Oct 01, 2021 at 04:22:46PM -0700, Tim Chen wrote:
quoted
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
quoted
quoted
The one questino I have is, do we want default y?
I also agree that default y is preferable.
I'll change at least the x86 one to:
default y
depends on SMP
quoted
quoted
The one nit I have is the Kconfig text, I'm not really sure that's
clarifying what a cluster is.
Do you have a preference of a different name other than cluster?
Or simply better documentation on what a cluster is for ARM64
and x86 in Kconfig?
Yes, better wording as to what a cluster is. Currently the x86 and arm64
ones actually differ:
x86:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters of CPUs
sharing L2 cache. If unsure say N here.
arm64:
help
Cluster scheduler support improves the CPU scheduler's decision
making when dealing with machines that have clusters(sharing internal
bus or sharing LLC cache tag). If unsure say N here.
(also, all this stuff being replicated across arch/*/Kconfig seems
unfortunate)
perhaps worth a separate patchset to do some cleanup so that SCHED_MC,
SCHED_SMT etc
won't be replicated in different architectures. Right now, this kind
of Kconfig option is copied
everywhere. I am seeing SCHED_SMT in all of
arch/arm/Kconfig
arch/arm64/Kconfig
arch/ia64/Kconfig
arch/mips/Kconfig
arch/powerpc/Kconfig
arch/s390/Kconfig
arch/sparc/Kconfig
arch/x86/Kconfig
...
Is it a better way to move them to a common Kconfig and let the architectures to
declare things like ARCH_HAVE_SMT?
Thanks
Barry
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From: Peter Zijlstra <peterz@infradead.org> Date: 2021-10-05 10:44:36
On Tue, Oct 05, 2021 at 10:01:09PM +1300, Barry Song wrote:
On Tue, Oct 5, 2021 at 8:35 PM Peter Zijlstra [off-list ref] wrote:
quoted
On Fri, Sep 24, 2021 at 08:51:03PM +1200, Barry Song wrote:
quoted
From: Barry Song <redacted>
quoted
Signed-off-by: Yicong Yang <redacted>
Signed-off-by: Barry Song <redacted>
That is not a valid SoB pattern. The first SoB should be the author, the
last SoB should be the one sending the patch, in this case both are
Barry. What's Yicong's contribution in all this?
Yicong made the benchmarks of SPECrate and collected the result data which
is in the commit log. I am not quite sure what is the best tag for
him. Is Tested-by
appropriate in this case?
From: Peter Zijlstra <peterz@infradead.org> Date: 2021-10-05 11:04:00
On Tue, Oct 05, 2021 at 10:15:39PM +1300, Barry Song wrote:
quoted
(also, all this stuff being replicated across arch/*/Kconfig seems
unfortunate)
perhaps worth a separate patchset to do some cleanup so that SCHED_MC,
SCHED_SMT etc
won't be replicated in different architectures. Right now, this kind
of Kconfig option is copied
everywhere. I am seeing SCHED_SMT in all of
arch/arm/Kconfig
arch/arm64/Kconfig
arch/ia64/Kconfig
arch/mips/Kconfig
arch/powerpc/Kconfig
arch/s390/Kconfig
arch/sparc/Kconfig
arch/x86/Kconfig
...
Is it a better way to move them to a common Kconfig and let the architectures to
declare things like ARCH_HAVE_SMT?
Dunno, it's all a bit of a mess :/ I can't quickly see a sane
pattern there.
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On Fri, Oct 01, 2021 at 04:22:46PM -0700, Tim Chen wrote:
quoted
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
quoted
quoted
The one questino I have is, do we want default y?
I also agree that default y is preferable.
I'll change at least the x86 one to:
default y
depends on SMP
Huh, so the arm64 SCHED_{SMT,MC} configs are defaultless (I added SCHED_SMT
to arm64's defconfig not so long ago), but x86 has them default y, which
I'm thinking is a tad better, and would be nice to harmonize. Unfortunately
different architectures have their own dependency requirements - arm has
ARM_CPU_TOPOLOGY, parisc has PARISC_CPU_TOPOLOGY...
Would you hate making SCHED_* a "generic" config, with a common default and
help text, and punt the arch specific stuff to an ARCH_SUPPORTS_* knob?
Something like:
arch/arm/Kconfig:
select ARCH_SUPPORTS_SCHED_MC if ARM_CPU_TOPOLOGY
init/Kconfig:
config SCHED_MC
def_bool y
depends on ARCH_SUPPORTS_SCHED_MC && SMP
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On Fri, Oct 01, 2021 at 04:22:46PM -0700, Tim Chen wrote:
quoted
On Fri, 2021-10-01 at 16:57 +0200, Peter Zijlstra wrote:
quoted
quoted
The one questino I have is, do we want default y?
I also agree that default y is preferable.
I'll change at least the x86 one to:
default y
depends on SMP
Huh, so the arm64 SCHED_{SMT,MC} configs are defaultless (I added SCHED_SMT
to arm64's defconfig not so long ago), but x86 has them default y, which
I'm thinking is a tad better, and would be nice to harmonize. Unfortunately
different architectures have their own dependency requirements - arm has
ARM_CPU_TOPOLOGY, parisc has PARISC_CPU_TOPOLOGY...
Would you hate making SCHED_* a "generic" config, with a common default and
help text, and punt the arch specific stuff to an ARCH_SUPPORTS_* knob?
Something like:
arch/arm/Kconfig:
select ARCH_SUPPORTS_SCHED_MC if ARM_CPU_TOPOLOGY
init/Kconfig:
config SCHED_MC
def_bool y
depends on ARCH_SUPPORTS_SCHED_MC && SMP
... Which is essentially what Barry suggested somewhere else in the thread
(I TL; DR'd).
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@@ -617,6 +622,11 @@ void update_siblings_masks(unsigned int cpuid) if (cpuid_topo->package_id != cpu_topo->package_id) continue;+ if (cpuid_topo->cluster_id == cpu_topo->cluster_id) {+ cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling);+ cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling);+ }+
Hm so without cluster information (e.g. DT system), we have
->cluster_id=-1, we'll essentially copy the package mask into the cluster
mask.
The exposed cluster mask is still <= package mask which is sensible. Are we
fine with that, or do we need/want the mask to be empty in the -1 case? I'm
guessing userspace tools should check for either id!=-1 or if the exclusive
disjucntion of cluster vs package masks is non-empty.
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@@ -617,6 +622,11 @@ void update_siblings_masks(unsigned int cpuid) if (cpuid_topo->package_id != cpu_topo->package_id) continue;+ if (cpuid_topo->cluster_id == cpu_topo->cluster_id) {+ cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling);+ cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling);+ }+
Hm so without cluster information (e.g. DT system), we have
->cluster_id=-1, we'll essentially copy the package mask into the cluster
mask.
The exposed cluster mask is still <= package mask which is sensible. Are we
fine with that, or do we need/want the mask to be empty in the -1 case? I'm
guessing userspace tools should check for either id!=-1 or if the exclusive
disjucntion of cluster vs package masks is non-empty.
Hi Valentin,
Yep, this is a very good question. I'd like change the code to:
@@ -622,7 +622,8 @@ void update_siblings_masks(unsigned int cpuid)if(cpuid_topo->package_id!=cpu_topo->package_id)continue;-if(cpuid_topo->cluster_id==cpu_topo->cluster_id){+if(cpuid_topo->cluster_id==cpu_topo->cluster_id&&+cpuid_topo->cluster_id!=-1){cpumask_set_cpu(cpu,&cpuid_topo->cluster_sibling);cpumask_set_cpu(cpuid,&cpu_topo->cluster_sibling);}
This should be consistent with Tim's patch3/3 for x86 in case
id is BAD_APICID:
static bool match_l2c(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
{
...
/* Do not match if we do not have a valid APICID for cpu: */
if (per_cpu(cpu_l2c_id, cpu1) == BAD_APICID)
return false;
...
}
Thanks
Barry
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@@ -617,6 +622,11 @@ void update_siblings_masks(unsigned int cpuid) if (cpuid_topo->package_id != cpu_topo->package_id) continue;+ if (cpuid_topo->cluster_id == cpu_topo->cluster_id) {+ cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling);+ cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling);+ }+
Hm so without cluster information (e.g. DT system), we have
->cluster_id=-1, we'll essentially copy the package mask into the cluster
mask.
The exposed cluster mask is still <= package mask which is sensible. Are we
fine with that, or do we need/want the mask to be empty in the -1 case? I'm
guessing userspace tools should check for either id!=-1 or if the exclusive
disjucntion of cluster vs package masks is non-empty.
Hi Valentin,
Yep, this is a very good question. I'd like change the code to:
@@ -622,7 +622,8 @@ void update_siblings_masks(unsigned int cpuid)if(cpuid_topo->package_id!=cpu_topo->package_id)continue;-if(cpuid_topo->cluster_id==cpu_topo->cluster_id){+if(cpuid_topo->cluster_id==cpu_topo->cluster_id&&+cpuid_topo->cluster_id!=-1){cpumask_set_cpu(cpu,&cpuid_topo->cluster_sibling);cpumask_set_cpu(cpuid,&cpu_topo->cluster_sibling);}
Hi Peter,
Would you like to change this line in your tree? Or do you want me to send
a new patchset with this small change?
This should be consistent with Tim's patch3/3 for x86 in case
id is BAD_APICID:
static bool match_l2c(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
{
...
/* Do not match if we do not have a valid APICID for cpu: */
if (per_cpu(cpu_l2c_id, cpu1) == BAD_APICID)
return false;
...
}
yes. It is correct for patch 1/3, thanks!
BTW, patch2/3 is missing some benchmark data and tested-by/SOB tags, i guess
it is because you are still editing?
barry
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@@ -622,7 +622,8 @@ void update_siblings_masks(unsigned int cpuid)if(cpuid_topo->package_id!=cpu_topo->package_id)continue;-if(cpuid_topo->cluster_id==cpu_topo->cluster_id){+if(cpuid_topo->cluster_id==cpu_topo->cluster_id&&+cpuid_topo->cluster_id!=-1){cpumask_set_cpu(cpu,&cpuid_topo->cluster_sibling);cpumask_set_cpu(cpuid,&cpu_topo->cluster_sibling);}
This should be consistent with Tim's patch3/3 for x86 in case
id is BAD_APICID:
static bool match_l2c(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
{
...
/* Do not match if we do not have a valid APICID for cpu: */
if (per_cpu(cpu_l2c_id, cpu1) == BAD_APICID)
return false;
...
}
yes. It is correct for patch 1/3, thanks!
BTW, patch2/3 is missing some benchmark data and tested-by/SOB tags, i guess
it is because you are still editing?
Urgh, no, that's my script thinking one of the many
--------------
lines you got in there was a terminator. Fixed it, should be pushed out
again in a few minutes.
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oops, there is a typo there:
+ if (cpuid_topo->cluster_id == cpu_topo->cluster_id &&
+ cpuid_topo->clister_id != -1) {
clister should be cluster.
quoted
BTW, patch2/3 is missing some benchmark data and tested-by/SOB tags, i guess
it is because you are still editing?
Urgh, no, that's my script thinking one of the many
--------------
lines you got in there was a terminator. Fixed it, should be pushed out
again in a few minutes.