Thread (54 messages) 54 messages, 4 authors, 2021-05-28

Re: [PATCH 15/16] arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's

From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: 2021-05-27 11:52:17
Also in: linux-clk, linux-devicetree, linux-renesas-soc, linux-serial, lkml

Hi Geert,

On Thu, May 27, 2021 at 12:17 PM Geert Uytterhoeven
[off-list ref] wrote:
Hi Prabhakar,

On Fri, May 14, 2021 at 9:24 PM Lad Prabhakar
[off-list ref] wrote:
quoted
Add initial DTSI for RZ/G2{L,LC} SoC's.

File structure:
r9a07g044.dtsi  => RZ/G2L family SoC common parts
r9a07g044l.dtsi => Specific to RZ/G2L (R9A07G044L) SoC
r9a07g044l1.dtsi => Specific to RZ/G2L (R9A07G044L single cortex A55) SoC
r9a07g044l2.dtsi => Specific to RZ/G2L (R9A07G044L dual cortex A55) SoC

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
quoted
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/G2L and RZ/G2LC common SoC parts
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/r9a07g044l-cpg.h>
+
+/ {
+       compatible = "renesas,r9a07g044";
quoted
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZ/G2L R9A07G044L1 common parts
+ *
+ * Copyright (C) 2021 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r9a07g044l.dtsi"
+
+/ {
+       compatible = "renesas,r9a07g044l1";
This overwrites the main compatible value set by r9a07g044.dtsi before.
As per your bindings, you want both:

    compatible = "renesas,r9a07g044l1", "renesas,r9a07g044".
Agreed will fix that in next respin.

Cheers,
Prabhakar

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