[PATCH v3 14/30] dt-bindings: update the Allwinner GPADC device tree binding for H3 & A83T
From: Philipp Rossak <hidden>
Date: 2018-08-30 15:45:39
Also in:
linux-devicetree, linux-iio, lkml
Subsystem:
iio subsystem and drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Jonathan Cameron, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Allwinner H3 features a thermal sensor like the one in A33, but has its register re-arranged, the clock divider moved to CCU (originally the clock divider is in ADC) and added a pair of bus clock and reset. Allwinner A83T features a thermal sensor similar to the H3, the ths clock, the bus clock and the reset was removed from the CCU. The THS in A83T has a clock that is directly connected and runs with 24 MHz. Update the binding document to cover H3 and A83T. Signed-off-by: Philipp Rossak <redacted> --- .../devicetree/bindings/iio/adc/sun4i-gpadc.txt | 41 ++++++++++++++++++++-- 1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/sun4i-gpadc.txt b/Documentation/devicetree/bindings/iio/adc/sun4i-gpadc.txt
index a7ef9dd21f04..9116ad308cf1 100644
--- a/Documentation/devicetree/bindings/iio/adc/sun4i-gpadc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/sun4i-gpadc.txt@@ -4,12 +4,35 @@ The Allwinner SoCs all have an ADC that can also act as a thermal sensor and sometimes as a touchscreen controller. Required properties: - - compatible: "allwinner,sun8i-a33-ths", + - compatible: must contain one of the following compatibles: + - "allwinner,sun8i-a33-ths" + - "allwinner,sun8i-h3-ths" + - "allwinner,sun8i-a83t-ths" - reg: mmio address range of the chip, - - #thermal-sensor-cells: shall be 0, + - #thermal-sensor-cells: + Please refer <devicetree/bindings/thermal/thermal.txt>, - #io-channel-cells: shall be 0, -Example: +Required properties for the following compatibles: + - "allwinner,sun8i-h3-ths" + - "allwinner,sun8i-a83t-ths" + - interrupts: the sampling interrupt of the ADC, + +Required properties for the following compatibles: + - "allwinner,sun8i-h3-ths" + - clocks: the bus clock and the input clock of the ADC, + - clock-names: should be "bus" and "mod", + - resets: the bus reset of the ADC, + +Optional properties for the following compatibles: + - "allwinner,sun8i-h3-ths" + - "allwinner,sun8i-a83t-ths" + - nvmem-cells: A phandle to the calibration data provided by a nvmem device. + - nvmem-cell-names: Should be "calibration". + +Details see: bindings/nvmem/nvmem.txt + +Example for A33: ths: ths at 1c25000 { compatible = "allwinner,sun8i-a33-ths"; reg = <0x01c25000 0x100>;
@@ -17,6 +40,18 @@ Example: #io-channel-cells = <0>; }; +Example for H3: + ths: thermal-sensor at 1c25000 { + compatible = "allwinner,sun8i-h3-ths"; + reg = <0x01c25000 0x400>; + clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_THS>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + #thermal-sensor-cells = <0>; + #io-channel-cells = <0>; + }; + sun4i, sun5i and sun6i SoCs are also supported via these bindings: Required properties:
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2.11.0