Hi Ondrej,

On Fri, Jun 24, 2016 at 5:21 AM,  [off-list ref] wrote:

From: Ondrej Jirman <redacted>

PLL1 on H3 requires special factors application algorithm,
when the rate is changed. This algorithm was extracted
from the arisc code that handles frequency scaling
in the BSP kernel.

This commit adds optional apply function to
struct factors_data, that can implement non-trivial
factors application method, when necessary.

Also struct clk_factors_config is extended with position
of the PLL lock flag.

Signed-off-by: Ondrej Jirman <redacted>
---
 arch/arm/boot/dts/sun8i-h3.dtsi |  2 +-
 drivers/clk/sunxi/clk-factors.c | 34 +++++++++----------
 drivers/clk/sunxi/clk-factors.h | 12 +++++++
 drivers/clk/sunxi/clk-sunxi.c   | 72 +++++++++++++++++++++++++++++++++++++++--
 4 files changed, 98 insertions(+), 22 deletions(-)

Shouldn't the .dtsi changes be in a separate patch?

Thanks,

-- 
Julian Calaby

Email: julian.calaby at gmail.com
Profile: http://www.google.com/profiles/julian.calaby/