Thread (54 messages) 54 messages, 9 authors, 2014-01-16
STALE4552d

[PATCH 09/12] pcie: SPEAr13xx: Add designware pcie support

From: Mohit KUMAR DCG <hidden>
Date: 2013-12-13 04:30:03
Also in: linux-pci

Hello Arnd,
-----Original Message-----
From: Arnd Bergmann [mailto:arnd at arndb.de]
Sent: Thursday, December 12, 2013 4:31 AM
To: linux-arm-kernel at lists.infradead.org
Cc: Mohit KUMAR DCG; linux-pci at vger.kernel.org; Pratyush ANAND; Jingoo
Han; Viresh Kumar; spear-devel
Subject: Re: [PATCH 09/12] pcie: SPEAr13xx: Add designware pcie support

On Wednesday 11 December 2013, Mohit Kumar wrote:
quoted
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/resource.h>
+#include <mach/spear.h>
This won't actually build: you cannot access mach/*.h header files from
outside of mach-spear!
- OK, will fix it.
quoted
+struct spear13xx_pcie {
+	void __iomem		*phy_base;
+	void __iomem		*app_base;
+	struct clk		*clk;
+	struct pcie_port	pp;
+	int			id;
+	int			is_gen1;
+};
The pcie driver shouldn't have direct access to the phy registers, use a phy
driver for that.
- OK. In few workarounds we have to access controller as well as phy registers,
How we should handle such cases if we separate out phy driver from here? Should it be
through phy global functions called from pcie driver?

Thanks
Mohit
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