[Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+
From: linux@roeck-us.net (Guenter Roeck)
Date: 2013-08-12 22:48:57
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On Mon, Aug 12, 2013 at 11:12:50PM +0100, Russell King - ARM Linux wrote:
On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:quoted
On this point, yes. Equivalent bit from the PB926 TRM: http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html (There are differences between the PCI controllers on the different boards. Differences I know of are: * size of the three memory mapped regions * whether the top bits of the PCI address come from the top or bottom of the IMAP* registers I believe (based on some experimentation and an educated guess) that these both changed at the same point, but some of the board TRMs claim to be part one way part the other, presumably due to copy and paste error. In particular PB1176's TRM has a mangled description of the IMAP* registers which didn't match what the h/w actually did in my testing.)Bah, updated TRMs since my version. Right, so if I've traced everything correctly, this should work: /* * Slot INTA INTB INTC INTD * 31 PCI1 PCI2 PCI3 PCI0 * 30 PCI0 PCI1 PCI2 PCI3 * 29 PCI3 PCI0 PCI1 PCI2 */ return IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);
Assuming this is what you mean, I added the above code to versatile_map_irq(). It does not work, unfortunately, at least not in qemu 1.4.0. This is what the kernel reports for interrupt numbers: kernel irq result -------------------------------------- 3.10.6: 92 fails 3.10.6+above change: 94 fails 3.10.6+Paul's patch: 91 works Now is this a qemu problem or a kernel problem ? Thanks, Guenter