[Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+

On Mon, Aug 12, 2013 at 10:36:17PM +0100, Peter Maydell wrote:

On this point, yes. Equivalent bit from the PB926 TRM:
http://infocenter.arm.com/help/topic/com.arm.doc.dui0224i/Cacdijji.html

(There are differences between the PCI controllers on
the different boards. Differences I know of are:
 * size of the three memory mapped regions
 * whether the top bits of the PCI address come from the top
   or bottom of the IMAP* registers
I believe (based on some experimentation and an educated guess)
that these both changed at the same point, but some of the board
TRMs claim to be part one way part the other, presumably due to
copy and paste error. In particular PB1176's TRM has a mangled
description of the IMAP* registers which didn't match what the
h/w actually did in my testing.)

Bah, updated TRMs since my version.

Right, so if I've traced everything correctly, this should work:

        /*
         * Slot INTA    INTB    INTC    INTD
         *  31  PCI1    PCI2    PCI3    PCI0
         *  30  PCI0    PCI1    PCI2    PCI3
         *  29  PCI3    PCI0    PCI1    PCI2
         */
        return IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3);