Thread (49 messages) 49 messages, 5 authors, 2018-01-28
STALE3063d REVIEWED: 1 (0M)

[PATCH v4 5/9] eal/armv7: define coherent I/O memory barriers

From: Yongseok Koh <hidden>
Date: 2018-01-25 21:03:20
Subsystem: library code, the rest · Maintainers: Andrew Morton, Linus Torvalds

Signed-off-by: Yongseok Koh <redacted>
Acked-by: Jianbo Liu <redacted>
---
 lib/librte_eal/common/include/arch/arm/rte_atomic_32.h | 4 ++++
 1 file changed, 4 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
index 14c048640..d2b7fa20f 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
@@ -79,6 +79,10 @@ extern "C" {
 
 #define rte_io_rmb() rte_rmb()
 
+#define rte_cio_wmb() rte_wmb()
+
+#define rte_cio_rmb() rte_rmb()
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.11.0
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