[PATCH v4 3/9] eal/x86: define coherent I/O memory barriers
From: Yongseok Koh <hidden>
Date: 2018-01-25 21:03:16
Subsystem:
library code, the rest · Maintainers:
Andrew Morton, Linus Torvalds
Signed-off-by: Yongseok Koh <redacted> --- lib/librte_eal/common/include/arch/x86/rte_atomic.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic.h b/lib/librte_eal/common/include/arch/x86/rte_atomic.h
index 36cfabc38..8fb796c63 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_atomic.h@@ -39,6 +39,10 @@ extern "C" { #define rte_io_rmb() rte_compiler_barrier() +#define rte_cio_wmb() rte_compiler_barrier() + +#define rte_cio_rmb() rte_compiler_barrier() + /*------------------------- 16 bit atomic operations -------------------------*/ #ifndef RTE_FORCE_INTRINSICS
--
2.11.0