[PATCH v4 4/9] eal/ppc64: define coherent I/O memory barriers
From: Yongseok Koh <hidden>
Date: 2018-01-25 21:03:18
Subsystem:
library code, the rest · Maintainers:
Andrew Morton, Linus Torvalds
Signed-off-by: Yongseok Koh <redacted> --- lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index 150810cdb..f38618f90 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h@@ -93,6 +93,10 @@ extern "C" { #define rte_io_rmb() rte_rmb() +#define rte_cio_wmb() rte_wmb() + +#define rte_cio_rmb() rte_rmb() + /*------------------------- 16 bit atomic operations -------------------------*/ /* To be compatible with Power7, use GCC built-in functions for 16 bit * operations */
--
2.11.0