Enable the AC200 control path and RMII Ethernet link on the Tanix TX6
family, and provide the board's 3.3 V rail to the AC200 function supplies.
Route the PHY interrupt through the AC200 interrupt controller and mark
it as a wakeup source for link interrupts and magic-packet wake.
Signed-off-by: James Hilliard <redacted>
---
arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
index bb7de37c0d58..6cd75961e3cc 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix.dtsi
@@ -7,9 +7,11 @@
#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/x-powers,ac200.h>
/ {
aliases {
+ ethernet0 = &emac;
serial0 = &uart0;
};
@@ -84,6 +86,22 @@ wifi_pwrseq: wifi-pwrseq {
};
};
+&ac200 {
+ ac-ldoin-supply = <®_vcc3v3>;
+ ephy-vcc-supply = <®_vcc3v3>;
+ rtc-vcc-supply = <®_vcc3v3>;
+ tv-vcc-supply = <®_vcc3v3>;
+ status = "okay";
+};
+
+&ac200_ephy_ctl {
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <®_vdd_cpu_gpu>;
};@@ -104,6 +122,14 @@ &ehci3 {
status = "okay";
};
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&ac200_ephy>;
+ status = "okay";
+};
+
&gpu {
mali-supply = <®_vdd_cpu_gpu>;
status = "okay";@@ -119,6 +145,21 @@ hdmi_out_con: endpoint {
};
};
+&i2c3 {
+ status = "okay";
+};
+
+&mdio {
+ ac200_ephy: ethernet-phy@1 {
+ compatible = "ethernet-phy-id0044.1400";
+ reg = <1>;
+ interrupts-extended = <&ac200 AC200_IRQ_EPHY>;
+ wakeup-source;
+ x-powers,ac200-control = <&ac200_ephy_ctl>;
+ x-powers,xmii-rx-clock-inverted;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;@@ -162,6 +203,10 @@ &pio {
vcc-pg-supply = <®_vcc1v8>;
};
+&pwm {
+ status = "okay";
+};
+
&r_ir {
status = "okay";
};
--
2.53.0