[PATCH 11/21] dt-bindings: net: x-powers: add AC300 EPHY control
From: James Hilliard <hidden>
Date: 2026-08-03 05:16:08
Also in:
linux-arm-kernel, linux-devicetree, linux-rockchip, linux-sunxi, lkml
Subsystem:
networking drivers, open firmware and flattened device tree bindings, the rest · Maintainers:
Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
The AC300 companion IC exposes the Fast Ethernet PHY control registers through a separate non-PHY Clause 22 address. The manual defines the control address as the link-PHY address plus 16, giving address ranges of 16-23 and 0-7 respectively. Describe the control endpoint, its required VCC1 supply, its 24, 25 or 27 MHz input clock, interface mode and calibration cell. Signed-off-by: James Hilliard <redacted> --- .../bindings/net/x-powers,ac300-ephy-ctl.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/x-powers,ac300-ephy-ctl.yaml b/Documentation/devicetree/bindings/net/x-powers,ac300-ephy-ctl.yaml
new file mode 100644
index 000000000000..a6634fcfafd4
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/x-powers,ac300-ephy-ctl.yaml@@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/x-powers,ac300-ephy-ctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: X-Powers AC300 Ethernet PHY control interface + +maintainers: + - James Hilliard <james.hilliard1@gmail.com> + +description: + The AC300 Fast Ethernet PHY has a separate control interface accessed as a + non-PHY Clause 22 device. Its address is 16 plus the address of the link PHY. + +properties: + compatible: + const: x-powers,ac300-ephy-ctl + + reg: + minimum: 16 + maximum: 23 + + clocks: + maxItems: 1 + description: + AC300 input clock. Its configured rate must be 24, 25, or 27 MHz and + determines the corresponding EPHY_CLK_SEL value. + + vcc1-supply: + description: + 3.3 V supply for the AC300 I/O, bandgap, Ethernet PHY analog front end, + and internal digital LDO + + nvmem-cells: + maxItems: 1 + description: + SoC SID cell containing the Ethernet PHY calibration value written to + the AC300 BGS_EFFUSE field after adding 3 modulo 16, as prescribed by + the vendor initialization sequence. + + nvmem-cell-names: + const: calibration + + phy-mode: + enum: + - mii + - rmii + +required: + - compatible + - reg + - clocks + - vcc1-supply + - nvmem-cells + - nvmem-cell-names + - phy-mode + +additionalProperties: false + +examples: + - | + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy-control@10 { + compatible = "x-powers,ac300-ephy-ctl"; + reg = <0x10>; + clocks = <&pwm 5>; + vcc1-supply = <®_3v3>; + nvmem-cells = <&ephy_calibration>; + nvmem-cell-names = "calibration"; + phy-mode = "rmii"; + }; + }; +...
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2.53.0