quoted

quoted

+  fsd-rx-clock-skew:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle to the syscon node
+          - description: offset of the control register
+    description:
+      Should be phandle/offset pair. The phandle to the syscon node.

What clock are you skew-ing here? And why?

As per customer's requirement, we need 2ns delay in fsys block both in TX
and RX path.

Lots of people get RGMII delays wrong. Please look back at the mailing
list where there is plenty of discussion about this. I don't want to
have to repeat myself yet again...

     Andrew