[PATCH 11/14] arm64: renesas: rzg3s-smarc-som: Invert the logic for SW_SD2_EN macro
From: Claudiu <claudiu.beznea@tuxon.dev>
Date: 2023-11-20 07:02:30
Also in:
linux-arm-kernel, linux-clk, linux-devicetree, linux-gpio, linux-renesas-soc, lkml
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
The intention of SW_SD2_EN macro was to reflect the state of SW_CONFIG3
switch available on RZ/G3S Smarc Module. According to documentation SD2
is enabled when switch is in OFF state. For this, changed the logic of
marco to map value 0 to switch's OFF state and value 1 to switch's ON
state. Along with this update the description for each state for better
understanding.
The value of SW_SD2_EN macro was not changed in file because, according to
documentation, the default state for this switch is ON.
Fixes: adb4f0c5699c ("arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
index 01a4a9da7afc..275b14acd2ee 100644
--- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi@@ -14,8 +14,8 @@ * 0 - SD0 is connected to eMMC * 1 - SD0 is connected to uSD0 card * @SW_SD2_EN: - * 0 - SCIF1, SSI0, IRQ0, IRQ1 connected to SoC - * 1 - SD2 is connected to SoC + * 0 - (switch OFF) SD2 is connected to SoC + * 1 - (switch ON) SCIF1, SSI0, IRQ0, IRQ1 connected to SoC */ #define SW_SD0_DEV_SEL 1 #define SW_SD2_EN 1
@@ -25,7 +25,7 @@ / { aliases { mmc0 = &sdhi0; -#if SW_SD2_EN +#if !SW_SD2_EN mmc2 = &sdhi2; #endif };
@@ -116,7 +116,7 @@ &sdhi0 { }; #endif -#if SW_SD2_EN +#if !SW_SD2_EN &sdhi2 { pinctrl-0 = <&sdhi2_pins>; pinctrl-names = "default";
--
2.39.2