Thread (123 messages) 123 messages, 7 authors, 2022-07-26

RE: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes bindings

From: Camelia Alexandra Groza <hidden>
Date: 2022-07-22 12:41:49
Also in: linux-arm-kernel, linux-devicetree, linux-phy, lkml

-----Original Message-----
From: Sean Anderson <redacted>
Sent: Thursday, July 21, 2022 18:41
To: Camelia Alexandra Groza <redacted>; David S . Miller
[off-list ref]; Jakub Kicinski [off-list ref]; Madalin Bucur
[off-list ref]; netdev@vger.kernel.org
Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
[off-list ref]; linux-arm-kernel@lists.infradead.org; Russell
King [off-list ref]; linux-kernel@vger.kernel.org; Kishon Vijay
Abraham I [off-list ref]; Krzysztof Kozlowski
[off-list ref]; Leo Li [off-list ref]; Rob
Herring [off-list ref]; Shawn Guo [off-list ref]; Vinod
Koul [off-list ref]; devicetree@vger.kernel.org; linux-
phy@lists.infradead.org
Subject: Re: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
bindings



On 7/21/22 10:20 AM, Camelia Alexandra Groza wrote:
quoted
quoted
-----Original Message-----
From: Sean Anderson <redacted>
Sent: Saturday, July 16, 2022 1:00
To: David S . Miller <davem@davemloft.net>; Jakub Kicinski
[off-list ref]; Madalin Bucur [off-list ref];
netdev@vger.kernel.org
Cc: Paolo Abeni <pabeni@redhat.com>; Eric Dumazet
[off-list ref]; linux-arm-kernel@lists.infradead.org; Russell
King [off-list ref]; linux-kernel@vger.kernel.org; Sean
Anderson
quoted
quoted
[off-list ref]; Kishon Vijay Abraham I [off-list ref];
Krzysztof Kozlowski [off-list ref]; Leo Li
[off-list ref]; Rob Herring [off-list ref]; Shawn Guo
[off-list ref]; Vinod Koul [off-list ref];
devicetree@vger.kernel.org; linux-phy@lists.infradead.org
Subject: [PATCH net-next v3 46/47] arm64: dts: ls1046ardb: Add serdes
bindings

This adds appropriate bindings for the macs which use the SerDes. The
156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
no driver for this device (and as far as I know all you can do with the
100MHz clocks is gate them), so I have chosen to model it as a single
fixed clock.

Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
This means that Lane A (what the driver thinks is lane 0) uses pins
SD1_TX3_P/N.

Because this will break ethernet if the serdes is not enabled, enable
the serdes driver by default on Layerscape.

Signed-off-by: Sean Anderson <redacted>
---
Please let me know if there is a better/more specific config I can use
here.

(no changes since v1)
My LS1046ARDB hangs at boot with this patch right after the second SerDes
is probed,
quoted
right before the point where the PCI host bridge is registered. I can get
around this
quoted
either by disabling the second SerDes node from the device tree, or
disabling
quoted
CONFIG_PCI_LAYERSCAPE at build.

I haven't debugged it more but there seems to be an issue here.
Hm. Do you have anything plugged into the PCIe/SATA slots? I haven't been
testing with
anything there. For now, it may be better to just leave it disabled.

--Sean
Yes, I have an Intel e1000 card plugged in.

Camelia
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