On 7/16/22 2:17 PM, Andrew Lunn wrote:

On Fri, Jul 15, 2022 at 05:59:19PM -0400, Sean Anderson wrote:

quoted

This adds support for the AQR115 (which I have on my LS1046A RDB). I had a
quick look over the registers, and it seems to be compatible with the
AQR107. I couldn't find this oui anywhere, but that's what I have on my
board. It's possible that NXP used a substitute here; I can't confirm
the part number since there is a heatsink on top of the phy.

If i remember correctly, the OUI can be part of the provisioning for
Aquantia PHYs. And i think there is often per board provisioning,
specially for the SERDEs configuration. So aQuantia/Marvell probably
set this OUI, but maybe at NXP request.

Ah, interesting.

Did you get the part number from the schematic? That should be enough
to confirm it is a AQR115.

Yes, I got it off the schematic.

quoted

To avoid breaking <10G ethernet on the LS1046ARDB, we must add this
vendor id as an exception to dpaa_phy_init. This will be removed once
the DPAA driver is converted to phylink.

I suggest you split this into two. The PHY changes can be merged right
away, and is independent of the DPAA. 

The DPAA changes must be merged before the phy changes. At the moment,
sub-10G ethernet still works on the LS1046ARDB. This is because even though
we program an advertisement of only 10G link modes, the phy by default
ignores the programmed advertisement. But by adding a driver for this phy,
the 10G-only advertisement will take effect and no link will be established.
So the DPAA change must come before the phy change.

Since there is no harm, I will split the DPAA change into its own patch and
place it before this one.

Given the size of this patchset,
the more you can split it up into parallel submissions the better. So
please submit the PHY patches independent of the rest.

Yes, that is the strategy outlined in the cover letter.

quoted

Signed-off-by: Sean Anderson <redacted>

For the aquantia_main.c change only:

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

     Andrew

--Sean