Thread (72 messages) flat view 72 messages, 7 authors, 2021-05-16

Re: [RFC PATCH net-next v4 19/28] net: dsa: qca8k: make rgmii delay configurable

From: Ansuel Smith <ansuelsmth@gmail.com>
Date: 2021-05-09 01:17:38
Also in: lkml

On Sun, May 09, 2021 at 03:07:15AM +0200, Andrew Lunn wrote:
On Sun, May 09, 2021 at 01:58:07AM +0200, Ansuel Smith wrote:
quoted
On Sat, May 08, 2021 at 08:12:26PM +0200, Andrew Lunn wrote:
quoted
quoted
+
+	/* Assume only one port with rgmii-id mode */
Since this is only valid for the RGMII port, please look in that
specific node for these properties.

	 Andrew
Sorry, can you clarify this? You mean that I should check in the phandle
pointed by the phy-handle or that I should modify the logic to only
check for one (and the unique in this case) rgmii port?
Despite there only being one register, it should be a property of the
port. If future chips have multiple RGMII ports, i expect there will
be multiple registers. To avoid confusion in the future, we should
make this a proper to the port it applies to. So assuming the RGMII
port is port 0:

                                #address-cells = <1>;
                                #size-cells = <0>;
                                port@0 {
                                        reg = <0>;
                                        label = "cpu";
                                        ethernet = <&gmac1>;
                                        phy-mode = "rgmii";
                                        fixed-link {
                                                speed = 1000;
                                                full-duplex;
                                        };
					rx-internal-delay-ps = <2000>;
					tx-internal-delay-ps = <2000>;
                                };

                                port@1 {
                                        reg = <1>;
                                        label = "lan1";
                                        phy-handle = <&phy_port1>;
                                };

                                port@2 {
                                        reg = <2>;
                                        label = "lan2";
                                        phy-handle = <&phy_port2>;
                                };

                                port@3 {
                                        reg = <3>;
                                        label = "lan3";
                                        phy-handle = <&phy_port3>;
                                };

                                port@4 {
                                        reg = <4>;
                                        label = "lan4";
                                        phy-handle = <&phy_port4>;
                                };

                                port@5 {
                                        reg = <5>;
                                        label = "wan";
                                        phy-handle = <&phy_port5>;
                                };
                        };
                };
        };

You also should validate that phy-mode is rgmii and only rgmii. You
get into odd situations if it is any of the other three rgmii modes.

    Andrew
And that is the intention of the port. I didn't want the binding to be
set on the switch node but on the rgmii node. Correct me if I'm wrong
but isn't what this patch already do?

In of_rgmii_delay I get the ports node of the current switch, iterate
every port, find the one with the phy-mode set to "rgmii-id" and check
if it's present any value. And save the value in the priv struct.
The actual delay is applied in the phylink_mac_config only if the mode
is set to rgmii-id. (the current code set by default a delay of 3000
with rgmii-id, so this is just to make this value configurable)
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