On 5/7/2021 5:28 PM, Ansuel Smith wrote:
With the use of the qca8k dsa driver, some problem arised related to
port status detection. With a load on a specific port (for example a
simple speed test), the driver starts to behave in a strange way and
garbage data is produced. To address this, enlarge the sleep delay and
address a bug for the reg offset 31 that require additional delay for
this specific reg.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
I am still curious whether the problem is that you have lots of traffic
going through the same bus fabric (AXI?) and that eventually puts the
register accesses to a lower priority to get through. We would most
likely need someone from QCA to tell if this is even remotely a
possibility and this is unlikely to happen.
--
Florian