From: Pavel Machek <hidden> Date: 2016-11-23 10:51:31
Hi!
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
Test code is attached, I use these parameters for testing:
./udp-test raw 10.0.0.6 1234 1000 100 30
The delays seem to be related to coalescing:
drivers/net/ethernet/stmicro/stmmac/common.h
#define STMMAC_COAL_TX_TIMER 40000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
If I lower the parameters, delays are gone, but I get netdev watchdog
backtrace followed by broken driver.
Any ideas what is going on there?
[I'm currently trying to get newer kernels working on affected
hardware.]
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
From: Pavel Machek <hidden> Date: 2016-11-24 08:55:11
Hi!
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
Test code is attached, I use these parameters for testing:
./udp-test raw 10.0.0.6 1234 1000 100 30
The delays seem to be related to coalescing:
drivers/net/ethernet/stmicro/stmmac/common.h
#define STMMAC_COAL_TX_TIMER 40000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
If I lower the parameters, delays are gone, but I get netdev watchdog
backtrace followed by broken driver.
Any ideas what is going on there?
From: Pavel Machek <hidden> Date: 2016-11-24 10:29:06
Hi!
What is going on with stmmac_tso_xmit() vs. stmmac_xmit()? One seems
to be copy of another, with subtle differences -- like calling
netif_queue_stopped() under spin_lock(&priv->tx_lock), or not.
What is going on with all these likely()s? Likely new hardware owners
will not be happy... or anyone running a lot of jumbo frames. (Perhaps
CPU's branch prediction can do better job here, without explicit hints?)
if (unlikely(is_jumbo) && likely(priv->synopsys_id <
DWMAC_CORE_4_00)) {
Are you sure this is okay?
if (unlikely(netif_queue_stopped(priv->dev) &&
stmmac_tx_avail(priv) > STMMAC_TX_THRESH)) {
netif_tx_lock(priv->dev);
if (netif_queue_stopped(priv->dev) &&
stmmac_tx_avail(priv) > STMMAC_TX_THRESH) {
---
Fix english in comments.
Signed-off-by: Pavel Machek <redacted>
@@ -1747,11 +1747,11 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)if(priv->hw->pcs&&priv->hw->mac->pcs_ctrl_ane)priv->hw->mac->pcs_ctrl_ane(priv->hw,1,priv->hw->ps,0);-/* set TX ring length */+/* Set TX ring length */if(priv->hw->dma->set_tx_ring_len)priv->hw->dma->set_tx_ring_len(priv->ioaddr,(DMA_TX_SIZE-1));-/* set RX ring length */+/* Set RX ring length */if(priv->hw->dma->set_rx_ring_len)priv->hw->dma->set_rx_ring_len(priv->ioaddr,(DMA_RX_SIZE-1));
@@ -2212,7 +2212,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)priv->tx_skbuff[first_entry]=skb;enh_desc=priv->plat->enh_desc;-/* To program the descriptors according to the size of the frame */+/* Program the descriptors according to the size of the frame */if(enh_desc)is_jumbo=priv->hw->mode->is_jumbo_frm(skb->len,enh_desc);
@@ -2665,7 +2665,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)*@budget:maximumnumberofpacketsthatthecurrentCPUcanreceivefrom*allinterfaces.*Description:-*Tolookattheincomingframesandclearthetxresources.+*Lookattheincomingframesandclearthetxresources.*/staticintstmmac_poll(structnapi_struct*napi,intbudget){
@@ -2828,7 +2828,7 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)returnIRQ_NONE;}-/* To handle GMAC own interrupts */+/* Handle GMAC own interrupts */if((priv->plat->has_gmac)||(priv->plat->has_gmac4)){intstatus=priv->hw->mac->host_irq_status(priv->hw,&priv->xstats);
@@ -3145,7 +3145,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)priv->hw=mac;-/* To use the chained or ring mode */+/* Use the chained or ring mode */if(priv->synopsys_id>=DWMAC_CORE_4_00){priv->hw->mode=&dwmac4_ring_mode_ops;}else{
@@ -3191,7 +3191,7 @@ static int stmmac_hw_init(struct stmmac_priv *priv)}elsepr_info(" No HW DMA feature register supported");-/* To use alternate (extended), normal or GMAC4 descriptor structures */+/* Use alternate (extended), normal or GMAC4 descriptor structures */if(priv->synopsys_id>=DWMAC_CORE_4_00)priv->hw->desc=&dwmac4_desc_ops;else
From: Pavel Machek <hidden> Date: 2016-11-24 10:36:34
Hi!
What is going on with all these likely()s? Likely new hardware owners
will not be happy... or anyone running a lot of jumbo frames. (Perhaps
CPU's branch prediction can do better job here, without explicit hints?)
if (unlikely(is_jumbo) && likely(priv->synopsys_id <
DWMAC_CORE_4_00)) {
Fix english, remove misleading unlikely's.
Signed-off-by: Pavel Machek <redacted>
@@ -2003,7 +2003,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)/* Compute header lengths */proto_hdr_len=skb_transport_offset(skb)+tcp_hdrlen(skb);-/* Desc availability based on threshold should be enough safe */+/* Desc availability based on threshold should be safe enough */if(unlikely(stmmac_tx_avail(priv)<(((skb->len-proto_hdr_len)/TSO_MAX_BUFF_SIZE+1)))){if(!netif_queue_stopped(dev)){
@@ -2185,12 +2185,12 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)spin_lock(&priv->tx_lock);if(unlikely(stmmac_tx_avail(priv)<nfrags+1)){-spin_unlock(&priv->tx_lock);if(!netif_queue_stopped(dev)){netif_stop_queue(dev);/* This is a hard error, log it. */pr_err("%s: Tx Ring full when queue awake\n",__func__);}+spin_unlock(&priv->tx_lock);returnNETDEV_TX_BUSY;}
@@ -1960,6 +1960,38 @@ static void stmmac_tso_allocator(struct stmmac_priv *priv, unsigned int des,}}+staticvoidstmmac_xmit_common(structsk_buff*skb,structnet_device*dev,intnfrags,structdma_desc*desc)+{+structstmmac_priv*priv=netdev_priv(dev);++if(unlikely(stmmac_tx_avail(priv)<=(MAX_SKB_FRAGS+1))){+if(netif_msg_hw(priv))+pr_debug("%s: stop transmitted packets\n",__func__);+netif_stop_queue(dev);+}++dev->stats.tx_bytes+=skb->len;++/* According to the coalesce parameter the IC bit for the latest+*segmentisresetandthetimerre-startedtocleanthetxstatus.+*Thisapproachtakescareaboutthefragments:descisthefirst+*elementincaseofnoSG.+*/+priv->tx_count_frames+=nfrags+1;+if(likely(priv->tx_coal_frames>priv->tx_count_frames)){+mod_timer(&priv->txtimer,+STMMAC_COAL_TIMER(priv->tx_coal_timer));+}else{+priv->tx_count_frames=0;+priv->hw->desc->set_tx_ic(desc);+priv->xstats.tx_set_ic_bit++;+}++if(!priv->hwts_tx_en)+skb_tx_timestamp(skb);+}++/***stmmac_tso_xmit-Txentrypointofthedriverforoversizedframes(TSO)*@skb:thesocketbuffer
@@ -2280,31 +2293,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)print_pkt(skb->data,skb->len);}-if(unlikely(stmmac_tx_avail(priv)<=(MAX_SKB_FRAGS+1))){-if(netif_msg_hw(priv))-pr_debug("%s: stop transmitted packets\n",__func__);-netif_stop_queue(dev);-}--dev->stats.tx_bytes+=skb->len;--/* According to the coalesce parameter the IC bit for the latest-*segmentisresetandthetimerre-startedtocleanthetxstatus.-*Thisapproachtakescareaboutthefragments:descisthefirst-*elementincaseofnoSG.-*/-priv->tx_count_frames+=nfrags+1;-if(likely(priv->tx_coal_frames>priv->tx_count_frames)){-mod_timer(&priv->txtimer,-STMMAC_COAL_TIMER(priv->tx_coal_timer));-}else{-priv->tx_count_frames=0;-priv->hw->desc->set_tx_ic(desc);-priv->xstats.tx_set_ic_bit++;-}--if(!priv->hwts_tx_en)-skb_tx_timestamp(skb);+stmmac_xmit_common(skb,dev,nfrags,desc);/* Ready to fill the first descriptor and set the OWN bit w/o any*problemsbecauseallthedescriptorsareactuallyreadytobe
From: David Miller <davem@davemloft.net> Date: 2016-11-24 16:12:06
From: Pavel Machek <redacted>
Date: Thu, 24 Nov 2016 09:55:06 +0100
Hi!
quoted
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
Test code is attached, I use these parameters for testing:
./udp-test raw 10.0.0.6 1234 1000 100 30
The delays seem to be related to coalescing:
drivers/net/ethernet/stmicro/stmmac/common.h
#define STMMAC_COAL_TX_TIMER 40000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
If I lower the parameters, delays are gone, but I get netdev watchdog
backtrace followed by broken driver.
Any ideas what is going on there?
4.9-rc6 still has the delays. With the
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_TX_MAX_FRAMES 2
settings, delays go away, and driver still works. (It fails fairly
fast in 4.4). Good news. But the question still is: what is going on
there?
256 packets looks way too large for being a trigger for aborting the
TX coalescing timer.
Looking more deeply into this, the driver is using non-highres timers
to implement the TX coalescing. This simply cannot work.
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this driver.
From: Pavel Machek <hidden> Date: 2016-11-24 21:25:44
Hi!
quoted
quoted
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
...
quoted
4.9-rc6 still has the delays. With the
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_TX_MAX_FRAMES 2
settings, delays go away, and driver still works. (It fails fairly
fast in 4.4). Good news. But the question still is: what is going on
there?
256 packets looks way too large for being a trigger for aborting the
TX coalescing timer.
Looking more deeply into this, the driver is using non-highres timers
to implement the TX coalescing. This simply cannot work.
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Ok, I'd disable coalescing, but could not figure it out till. What is
generic way to do that?
It seems only thing stmmac_tx_timer() does is calling
stmmac_tx_clean(), which reclaims tx_skbuff[] entries. It should be
possible to do that explicitely, without delay, but it stops working
completely if I attempt to do that.
On a side note, stmmac_poll() does stmmac_enable_dma_irq() while
stmmac_dma_interrupt() disables interrupts. But I don't see any
protection between the two, so IMO it could race and we'd end up
without polling or interrupts...
Thanks and best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
@@ -44,6 +44,7 @@#define DWMAC_CORE_4_00 0x40#define STMMAC_CHAN0 0 /* Always supported and default for all chips */+/* These need to be power of two, and >= 4 */#define DMA_TX_SIZE 512#define DMA_RX_SIZE 512#define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1))
@@ -108,8 +108,8 @@ module_param(eee_timer, int, S_IRUGO | S_IWUSR);MODULE_PARM_DESC(eee_timer,"LPI tx expiration time in msec");#define STMMAC_LPI_T(x) (jiffies + msecs_to_jiffies(x))-/* By default the driver will use the ring mode to manage tx and rx descriptors-*butpassingthisvaluesousercanforcetousethechaininsteadofthering+/* By default the driver will use the ring mode to manage tx and rx descriptors,+*butallowusertoforcetousethechaininsteadofthering*/staticunsignedintchain_mode;module_param(chain_mode,int,S_IRUGO);
@@ -2966,6 +2966,8 @@ static int stmmac_sysfs_ring_open(struct inode *inode, struct file *file)returnsingle_open(file,stmmac_sysfs_ring_read,inode->i_private);}+/* Debugfs files, should appear in /sys/kernel/debug/stmmaceth/eth0 */+staticconststructfile_operationsstmmac_rings_status_fops={.owner=THIS_MODULE,.open=stmmac_sysfs_ring_open,
From: Pavel Machek <hidden> Date: 2016-11-28 12:13:43
Hi!
quoted
quoted
drivers/net/ethernet/stmicro/stmmac/common.h
#define STMMAC_COAL_TX_TIMER 40000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
If I lower the parameters, delays are gone, but I get netdev watchdog
backtrace followed by broken driver.
Any ideas what is going on there?
4.9-rc6 still has the delays. With the
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_TX_MAX_FRAMES 2
settings, delays go away, and driver still works. (It fails fairly
fast in 4.4). Good news. But the question still is: what is going on
there?
256 packets looks way too large for being a trigger for aborting the
TX coalescing timer.
Looking more deeply into this, the driver is using non-highres timers
to implement the TX coalescing. This simply cannot work.
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Hmm. I still don't understand how the coalescing is supposed to do any
good in this driver.
As long as transmits happen, it seems driver is not recycling used DMA
descriptors. When the transmits stops, it waits for 40msec, then
recycles them. We'll run out of DMA descriptors in 5msec at 100mbit
speeds.
Giuseppe Cavallaro, Alexandre Torgue: could you comment here? Can you
apply the cleanup patches? The driver is marked as supported, but I
see no reactions on email, and bugzilla is down :-(.
Thanks,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
@@ -929,6 +929,17 @@ static int stmmac_set_bfsize(int mtu, int bufsize)returnret;}+staticinlinestructdma_desc*stmmac_tx_desc(structstmmac_priv*priv,inti)+{+structdma_desc*p;+if(priv->extend_desc)+p=&((priv->dma_etx+i)->basic);+else+p=priv->dma_tx+i;+returnp;+}++/***stmmac_clear_descriptors-cleardescriptors*@priv:driverprivatestructure
Hi Pavel,
On 23.11.2016 11:51, Pavel Machek wrote:
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
Test code is attached, I use these parameters for testing:
./udp-test raw 10.0.0.6 1234 1000 100 30
The delays seem to be related to coalescing:
drivers/net/ethernet/stmicro/stmmac/common.h
#define STMMAC_COAL_TX_TIMER 40000
#define STMMAC_MAX_COAL_TX_TICK 100000
#define STMMAC_TX_MAX_FRAMES 256
If I lower the parameters, delays are gone, but I get netdev watchdog
backtrace followed by broken driver.
Any ideas what is going on there?
[I'm currently trying to get newer kernels working on affected
hardware.]
Best regards,
Pavel
I once encountered a similar behaviour with a driver. The reason was that the socket
queue limit was temporarily exhausted because the irq handler did not free the tx skbs
fast enough (that driver also used irq coalescing).
Calling skb_orphan() in the xmit handler made this issue disappear.
Regards,
Lino
Not now. Modifying the code while de-duplicating would be bad idea.
Too many people think overly granular patches are the
best and only way to make changes.
Deduplication and consolidation can happen simultaneously.
Can, but should not at this point. Please take a look at the driver in
question before commenting on trivial printk style.
I had.
It's perfectly acceptable and already uses netif_<level> properly.
This consolidation now introduces the _only_ instance where it is
now improperly using a netif_msg_<type> then single pr_<level>
function sequence that should be consolidated into netif_dbg.
Every other use of netif_msg_<level> then either emits multiple
lines or is used in an if/else.
cheers, Joe
Not now. Modifying the code while de-duplicating would be bad idea.
Too many people think overly granular patches are the
best and only way to make changes.
Deduplication and consolidation can happen simultaneously.
Can, but should not at this point. Please take a look at the driver in
question before commenting on trivial printk style.
I had.
It's perfectly acceptable and already uses netif_<level> properly.
This consolidation now introduces the _only_ instance where it is
now improperly using a netif_msg_<type> then single pr_<level>
function sequence that should be consolidated into netif_dbg.
Every other use of netif_msg_<level> then either emits multiple
lines or is used in an if/else.
Are you looking at right driver? I don't see single use of
netif_msg_<level>, but see this at stmmac_main.c:756. Code is actually
pretty consistent using pr_*.
if (netif_msg_link(priv))
pr_warn("%s: Speed (%d) not 10/100\n",
dev->name, phydev->speed);
Anyway, I'm moving code around, if you want to do trivial cleanups, do
them yourself.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
From: kbuild test robot <hidden> Date: 2016-11-28 15:26:07
Hi Pavel,
[auto build test WARNING on net-next/master]
[also build test WARNING on v4.9-rc7 next-20161128]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Pavel-Machek/stmmac-reduce-code-duplication-getting-basic-descriptors/20161128-204339
config: x86_64-randconfig-s1-11282147 (attached as .config)
compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All warnings (new ones prefixed by >>):
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c: In function 'dma_free_tx_skbufs':
Calling skb_orphan() in the xmit handler made this issue disappear.
This is not the way to handle this problem.
The solution is to free the SKBs in a timely manner after the
chip has transmitted the frame.
Note that the 'pauses' described by Pavel are also caused by a too small
SO_SNDBUF value on the UDP socket.
An immediate fix, with no kernel change is to increase it.
echo 1000000 >/proc/sys/net/core/wmem_default
or
val = 1000000;
setsockopt(fd, SOL_SOCKET, SO_SNDBUF, &val, sizeof(val));
Calling skb_orphan() in the xmit handler made this issue disappear.
This is not the way to handle this problem.
I agree, its not a clean solution. But if the use of skb_orphan makes the delays
disappear, it can at least be a hint that socket queue limits are involved.
Regards,
Lino
Calling skb_orphan() in the xmit handler made this issue disappear.
This is not the way to handle this problem.
The solution is to free the SKBs in a timely manner after the
chip has transmitted the frame.
Note that the 'pauses' described by Pavel are also caused by a too small
SO_SNDBUF value on the UDP socket.
An immediate fix, with no kernel change is to increase it.
echo 1000000 >/proc/sys/net/core/wmem_default
or
val = 1000000;
setsockopt(fd, SOL_SOCKET, SO_SNDBUF, &val, sizeof(val));
I wonder if the best fix would be indeed to deactivate irq coalescing completely.
Does it make any sense at all to use it if a driver uses NAPI already?
Regards,
Lino
Not now. Modifying the code while de-duplicating would be bad idea.
Too many people think overly granular patches are the
best and only way to make changes.
Deduplication and consolidation can happen simultaneously.
Can, but should not at this point. Please take a look at the driver in
question before commenting on trivial printk style.
I had.
It's perfectly acceptable and already uses netif_<level> properly.
This consolidation now introduces the _only_ instance where it is
now improperly using a netif_msg_<type> then single pr_<level>
function sequence that should be consolidated into netif_dbg.
Every other use of netif_msg_<level> then either emits multiple
lines or is used in an if/else.
Are you looking at right driver?
Yes and I think you should make changes against -next
and not Linus' where this is:
b3e51069627e2 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c (LABBE Corentin 2016-11-16 20:09:41 +0100 755) netif_warn(priv, link, priv->dev,
b3e51069627e2 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c (LABBE Corentin 2016-11-16 20:09:41 +0100 756) "Speed (%d) not 10/100\n",
b3e51069627e2 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c (LABBE Corentin 2016-11-16 20:09:41 +0100 757) phydev->speed);
I don't see single use of
netif_msg_<level>, but see this at stmmac_main.c:756. Code is actually
pretty consistent using pr_*.
if (netif_msg_link(priv))
pr_warn("%s: Speed (%d) not 10/100\n",
dev->name, phydev->speed);
Anyway, I'm moving code around, if you want to do trivial cleanups, do
them yourself.
I wonder if the best fix would be indeed to deactivate irq coalescing
completely.
Does it make any sense at all to use it if a driver uses NAPI already?
It absolutely does make sense, when it is implemented and functions
properly.
I wonder if the best fix would be indeed to deactivate irq coalescing
completely.
Does it make any sense at all to use it if a driver uses NAPI already?
It absolutely does make sense, when it is implemented and functions
properly.
Interesting. I always thought both (NAPI and irq coalescing) are essentially doing the same thing only
one time in software and one time with hw support. Did I misunderstand NAPI?
Regards,
Lino
Calling skb_orphan() in the xmit handler made this issue disappear.
This is not the way to handle this problem.
The solution is to free the SKBs in a timely manner after the
chip has transmitted the frame.
Note that the 'pauses' described by Pavel are also caused by a too small
SO_SNDBUF value on the UDP socket.
An immediate fix, with no kernel change is to increase it.
echo 1000000 >/proc/sys/net/core/wmem_default
@@ -28,8 +28,6 @@ CONFIG_STMMAC_PCI: is to enable the pci driver. 2) Driver parameters list: debug: message level (0: no output, 16: all); phyaddr: to manually provide the physical address to the PHY device;- dma_rxsize: DMA rx ring size;- dma_txsize: DMA tx ring size; buf_sz: DMA buffer size; tc: control the HW FIFO threshold; watchdog: transmit timeout (in milliseconds);
@@ -40,31 +38,31 @@ CONFIG_STMMAC_PCI: is to enable the pci driver. 3) Command line options Driver parameters can be also passed in command line by using:- stmmaceth=dma_rxsize:128,dma_txsize:512+ stmmaceth=watchdog:100,chain_mode=1 4) Driver information and notes 4.1) Transmit process The xmit method is invoked when the kernel needs to transmit a packet; it sets-the descriptors in the ring and informs the DMA engine that there is a packet+the descriptors in the ring and informs the DMA engine, that there is a packet ready to be transmitted. By default, the driver sets the NETIF_F_SG bit in the features field of the-net_device structure enabling the scatter-gather feature. This is true on+net_device structure, enabling the scatter-gather feature. This is true on chips and configurations where the checksum can be done in hardware.-Once the controller has finished transmitting the packet, napi will be+Once the controller has finished transmitting the packet, timer will be scheduled to release the transmit resources. 4.2) Receive process When one or more packets are received, an interrupt happens. The interrupts-are not queued so the driver has to scan all the descriptors in the ring during+are not queued, so the driver has to scan all the descriptors in the ring during the receive process.-This is based on NAPI so the interrupt handler signals only if there is work+This is based on NAPI, so the interrupt handler signals only if there is work to be done, and it exits. Then the poll method will be scheduled at some future point. The incoming packets are stored, by the DMA, in a list of pre-allocated socket buffers in order to avoid the memcpy (zero-copy).-4.3) Interrupt Mitigation+4.3) Interrupt mitigation The driver is able to mitigate the number of its DMA interrupts using NAPI for the reception on chips older than the 3.50. New chips have an HW RX-Watchdog used for this mitigation.
@@ -88,19 +86,20 @@ the list, hence creating the explicit chaining in the descriptor itself, whereas such explicit chaining is not possible in RING mode. 4.5.1) Extended descriptors- The extended descriptors give us information about the Ethernet payload- when it is carrying PTP packets or TCP/UDP/ICMP over IP.- These are not available on GMAC Synopsys chips older than the 3.50.- At probe time the driver will decide if these can be actually used.- This support also is mandatory for PTPv2 because the extra descriptors- are used for saving the hardware timestamps and Extended Status.+The extended descriptors give us information about the Ethernet payload+when it is carrying PTP packets or TCP/UDP/ICMP over IP.+These are not available on GMAC Synopsys chips older than the 3.50.+At probe time the driver will decide if these can be actually used.+This support also is mandatory for PTPv2 because the extra descriptors+are used for saving the hardware timestamps and Extended Status. 4.6) Ethtool support Ethtool is supported. For example, driver statistics (including RMON), internal errors can be taken using:- # ethtool -S ethX command+ # ethtool -S ethX+command 4.7) Jumbo and Segmentation Offloading Jumbo frames are supported and tested for the GMAC.
@@ -275,11 +274,11 @@ Please see the following document: Documentation/devicetree/bindings/net/stmmac.txt 4.11) This is a summary of the content of some relevant files:- o stmmac_main.c: to implement the main network device driver;- o stmmac_mdio.c: to provide mdio functions;- o stmmac_pci: this the PCI driver;- o stmmac_platform.c: this the platform driver (OF supported)- o stmmac_ethtool.c: to implement the ethtool support;+ o stmmac_main.c: implements the main network device driver;+ o stmmac_mdio.c: provides MDIO functions;+ o stmmac_pci: this is the PCI driver;+ o stmmac_platform.c: this the platform driver (OF supported);+ o stmmac_ethtool.c: implements the ethtool support; o stmmac.h: private driver structure; o common.h: common definitions and VFTs; o mmc_core.c/mmc.h: Management MAC Counters;
@@ -381,12 +380,12 @@ In addition to the basic timestamp features mentioned in IEEE 1588-2002 Timestamps, new GMAC cores support the advanced timestamp features. IEEE 1588-2008 that can be enabled when configure the Kernel.-8) SGMII/RGMII supports+8) SGMII/RGMII support New GMAC devices provide own way to manage RGMII/SGMII. This information is available at run-time by looking at the HW capability register. This means that the stmmac can manage-auto-negotiation and link status w/o using the PHYLIB stuff+auto-negotiation and link status w/o using the PHYLIB stuff. In fact, the HW provides a subset of extended registers to restart the ANE, verify Full/Half duplex mode and Speed.-Also thanks to these registers it is possible to look at the+Thanks to these registers, it is possible to look at the Auto-negotiated Link Parter Ability.
@@ -2771,12 +2771,8 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,features&=~NETIF_F_CSUM_MASK;/* Disable tso if asked by ethtool */-if((priv->plat->tso_en)&&(priv->dma_cap.tsoen)){-if(features&NETIF_F_TSO)-priv->tso=true;-else-priv->tso=false;-}+if((priv->plat->tso_en)&&(priv->dma_cap.tsoen))+priv->tso=!!(features&NETIF_F_TSO);
Pavel, this really seems arbitrary.
Whilst I really appreciate you're looking into this driver a bit because
of some issues you are trying to resolve, I'd like to ask that you not
start bombarding me with nit-pick cleanups here and there and instead
concentrate on the real bug or issue.
Thanks in advance.
From: Pavel Machek <hidden> Date: 2016-12-01 22:49:45
quoted
@@ -2771,12 +2771,8 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, features &= ~NETIF_F_CSUM_MASK; /* Disable tso if asked by ethtool */- if ((priv->plat->tso_en) && (priv->dma_cap.tsoen)) {- if (features & NETIF_F_TSO)- priv->tso = true;- else- priv->tso = false;- }+ if ((priv->plat->tso_en) && (priv->dma_cap.tsoen))+ priv->tso = !!(features & NETIF_F_TSO);
Pavel, this really seems arbitrary.
Whilst I really appreciate you're looking into this driver a bit because
of some issues you are trying to resolve, I'd like to ask that you not
start bombarding me with nit-pick cleanups here and there and instead
concentrate on the real bug or issue.
Well, fixing clean code is easier than fixing strange code... Plus I
was hoping to make the mainainers to talk. The driver is listed as
supported after all.
Anyway... since you asked. I belive I have way to disable NAPI / tx
coalescing in the driver. Unfortunately, locking is missing on the rx
path, and needs to be extended to _irqsave variant on tx path.
So patch currently looks like this (hand edited, can't be
applied, got it working few hours ago). Does it look acceptable?
I'd prefer this to go after the patch that pulls common code to single
place, so that single place needs to be patched. Plus I guess I should
add ifdefs, so that more advanced NAPI / tx coalescing code can be
reactivated when it is fixed. Trivial fixes can go on top. Does that
sound like a plan?
Which tree do you want patches against?
https://git.kernel.org/cgit/linux/kernel/git/davem/net-next.git/ ?
Best regards,
Pavel
@@ -1463,7 +1475,8 @@ static void stmmac_dma_interrupt(struct stmmac_priv *priv)}elsepr_err("napi: schedule failed\n");#endif+stmmac_tx_clean(priv);}if(unlikely(status&tx_hard_error_bump_tc)){/* Try to bump up the dma threshold on this failure */
@@ -1638,7 +1651,7 @@ static void stmmac_tx_timer(unsigned long data){structstmmac_priv*priv=(structstmmac_priv*)data;-stmmac_tx_clean(priv);+//stmmac_tx_clean(priv);}/**
@@ -2052,7 +2068,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)/* This is a hard error, log it. */pr_err("%s: Tx Ring full when queue awake\n",__func__);}-spin_unlock(&priv->tx_lock);+spin_unlock_irqrestore(&priv->tx_lock,flags);returnNETDEV_TX_BUSY;}
@@ -2212,7 +2229,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)/* This is a hard error, log it. */pr_err("%s: Tx Ring full when queue awake\n",__func__);}-spin_unlock(&priv->tx_lock);+spin_unlock_irqrestore(&priv->tx_lock,flags);returnNETDEV_TX_BUSY;}
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 08:24:58
Hello
On 11/24/2016 10:25 PM, Pavel Machek wrote:
Hi!
quoted
quoted
quoted
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
...
quoted
quoted
4.9-rc6 still has the delays. With the
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_TX_MAX_FRAMES 2
settings, delays go away, and driver still works. (It fails fairly
fast in 4.4). Good news. But the question still is: what is going on
there?
256 packets looks way too large for being a trigger for aborting the
TX coalescing timer.
Looking more deeply into this, the driver is using non-highres timers
to implement the TX coalescing. This simply cannot work.
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Ok, I'd disable coalescing, but could not figure it out till. What is
generic way to do that?
It seems only thing stmmac_tx_timer() does is calling
stmmac_tx_clean(), which reclaims tx_skbuff[] entries. It should be
possible to do that explicitely, without delay, but it stops working
completely if I attempt to do that.
On a side note, stmmac_poll() does stmmac_enable_dma_irq() while
stmmac_dma_interrupt() disables interrupts. But I don't see any
protection between the two, so IMO it could race and we'd end up
without polling or interrupts...
the idea behind the TX mitigation is to mix the interrupt and
timer and this approach gave us real benefit in terms
of performances and CPU usage (especially on SH4-200/SH4-300 platforms
based).
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
But there is a timer that can run (and we experimented that no high
resolution is needed) to clear the tx resources.
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it, again!
So, welcome any other schema and testing on platforms supported.
Hoping this summary can help.
Peppe
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 08:40:02
On 12/1/2016 11:48 PM, Pavel Machek wrote:
quoted
quoted
@@ -2771,12 +2771,8 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, features &= ~NETIF_F_CSUM_MASK; /* Disable tso if asked by ethtool */- if ((priv->plat->tso_en) && (priv->dma_cap.tsoen)) {- if (features & NETIF_F_TSO)- priv->tso = true;- else- priv->tso = false;- }+ if ((priv->plat->tso_en) && (priv->dma_cap.tsoen))+ priv->tso = !!(features & NETIF_F_TSO);
Pavel, this really seems arbitrary.
Whilst I really appreciate you're looking into this driver a bit because
of some issues you are trying to resolve, I'd like to ask that you not
start bombarding me with nit-pick cleanups here and there and instead
concentrate on the real bug or issue.
Well, fixing clean code is easier than fixing strange code... Plus I
was hoping to make the mainainers to talk. The driver is listed as
supported after all.
Absolutely, I am available to support you, better I can.
So no problem to clarify strange or complex parts of the driver
and find/try new solutions to enhance it.
Anyway... since you asked. I belive I have way to disable NAPI / tx
coalescing in the driver. Unfortunately, locking is missing on the rx
path, and needs to be extended to _irqsave variant on tx path.
I have just replied to a previous thread about that...
To be honest, I have in the box just a patch to fix lock on lpi
as I had discussed in this mailing list some week ago.
I will provide it asap.
So patch currently looks like this (hand edited, can't be
applied, got it working few hours ago). Does it look acceptable?
I'd prefer this to go after the patch that pulls common code to single
place, so that single place needs to be patched. Plus I guess I should
add ifdefs, so that more advanced NAPI / tx coalescing code can be
reactivated when it is fixed. Trivial fixes can go on top. Does that
sound like a plan?
Hmm, what I find strange is that, just this code is running since a
long time on several platforms and Chip versions. No raise condition
have been found or lock protection problems (also proving look
mechanisms).
I'd like to avoid to break old compatibilities and having the same
performances but if there are some bugs I can support to review
and test. Indeed, this year we have added the 4.x but some parts
of the code (for TSO) should be self-contained. So I cannot image
regressions on common part of the code... I let Alex to do a double
check.
Pavel, I ask you sorry if I missed some problems so, if you can
(as D. Miller asked) to send us a cover letter + all patches
I will try to reply soon. I can do also some tests if you ask
me that! I could run on 3.x and 4.x but I cannot promise you
benchmarks.
@@ -1463,7 +1475,8 @@ static void stmmac_dma_interrupt(struct stmmac_priv *priv)}elsepr_err("napi: schedule failed\n");#endif+stmmac_tx_clean(priv);}if(unlikely(status&tx_hard_error_bump_tc)){/* Try to bump up the dma threshold on this failure */
@@ -1638,7 +1651,7 @@ static void stmmac_tx_timer(unsigned long data){structstmmac_priv*priv=(structstmmac_priv*)data;-stmmac_tx_clean(priv);+//stmmac_tx_clean(priv);}/**
@@ -2052,7 +2068,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff *skb, struct net_device *dev)/* This is a hard error, log it. */pr_err("%s: Tx Ring full when queue awake\n",__func__);}-spin_unlock(&priv->tx_lock);+spin_unlock_irqrestore(&priv->tx_lock,flags);returnNETDEV_TX_BUSY;}
@@ -2212,7 +2229,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)/* This is a hard error, log it. */pr_err("%s: Tx Ring full when queue awake\n",__func__);}-spin_unlock(&priv->tx_lock);+spin_unlock_irqrestore(&priv->tx_lock,flags);returnNETDEV_TX_BUSY;}
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 08:42:06
+ Lino
On 12/2/2016 9:24 AM, Giuseppe CAVALLARO wrote:
Hello
On 11/24/2016 10:25 PM, Pavel Machek wrote:
quoted
Hi!
quoted
quoted
quoted
I'm debugging strange delays during transmit in stmmac driver. They
seem to be present in 4.4 kernel (and older kernels, too). Workload is
burst of udp packets being sent, pause, burst of udp packets, ...
...
quoted
quoted
4.9-rc6 still has the delays. With the
#define STMMAC_COAL_TX_TIMER 1000
#define STMMAC_TX_MAX_FRAMES 2
settings, delays go away, and driver still works. (It fails fairly
fast in 4.4). Good news. But the question still is: what is going on
there?
256 packets looks way too large for being a trigger for aborting the
TX coalescing timer.
Looking more deeply into this, the driver is using non-highres timers
to implement the TX coalescing. This simply cannot work.
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Ok, I'd disable coalescing, but could not figure it out till. What is
generic way to do that?
It seems only thing stmmac_tx_timer() does is calling
stmmac_tx_clean(), which reclaims tx_skbuff[] entries. It should be
possible to do that explicitely, without delay, but it stops working
completely if I attempt to do that.
On a side note, stmmac_poll() does stmmac_enable_dma_irq() while
stmmac_dma_interrupt() disables interrupts. But I don't see any
protection between the two, so IMO it could race and we'd end up
without polling or interrupts...
the idea behind the TX mitigation is to mix the interrupt and
timer and this approach gave us real benefit in terms
of performances and CPU usage (especially on SH4-200/SH4-300 platforms
based).
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
But there is a timer that can run (and we experimented that no high
resolution is needed) to clear the tx resources.
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it, again!
So, welcome any other schema and testing on platforms supported.
Hoping this summary can help.
Peppe
From: Pavel Machek <hidden> Date: 2016-12-02 08:45:17
Hi!
quoted
quoted
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Ok, I'd disable coalescing, but could not figure it out till. What is
generic way to do that?
It seems only thing stmmac_tx_timer() does is calling
stmmac_tx_clean(), which reclaims tx_skbuff[] entries. It should be
possible to do that explicitely, without delay, but it stops working
completely if I attempt to do that.
On a side note, stmmac_poll() does stmmac_enable_dma_irq() while
stmmac_dma_interrupt() disables interrupts. But I don't see any
protection between the two, so IMO it could race and we'd end up
without polling or interrupts...
the idea behind the TX mitigation is to mix the interrupt and
timer and this approach gave us real benefit in terms
of performances and CPU usage (especially on SH4-200/SH4-300 platforms
based).
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.
And that's why low-res timers do not cut it.
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
But there is a timer that can run (and we experimented that no high
resolution is needed) to clear the tx resources.
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 09:44:45
Hi Pavel
On 12/2/2016 9:45 AM, Pavel Machek wrote:
Hi!
quoted
quoted
quoted
1 HZ, which is the lowest granularity of non-highres timers in the
kernel, is variable as well as already too large of a delay for
effective TX coalescing.
I seriously think that the TX coalescing support should be ripped out
or disabled entirely until it is implemented properly in this
driver.
Ok, I'd disable coalescing, but could not figure it out till. What is
generic way to do that?
It seems only thing stmmac_tx_timer() does is calling
stmmac_tx_clean(), which reclaims tx_skbuff[] entries. It should be
possible to do that explicitely, without delay, but it stops working
completely if I attempt to do that.
On a side note, stmmac_poll() does stmmac_enable_dma_irq() while
stmmac_dma_interrupt() disables interrupts. But I don't see any
protection between the two, so IMO it could race and we'd end up
without polling or interrupts...
the idea behind the TX mitigation is to mix the interrupt and
timer and this approach gave us real benefit in terms
of performances and CPU usage (especially on SH4-200/SH4-300 platforms
based).
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.
And that's why low-res timers do not cut it.
in that case, I expect that the tuning of the driver could help you.
I mean, by using ethtool, it could be enough to set the IC bit on all
the descriptors. You should touch the tx_coal_frames.
Then you can use ethtool -S to monitor the status.
We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.
FYI, stmmac doesn't implement adaptive algo.
quoted
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!
quoted
But there is a timer that can run (and we experimented that no high
resolution is needed) to clear the tx resources.
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!
Well, I certainly like the fact that we are talking :-).
And yes, I have some questions.
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
From: Pavel Machek <hidden> Date: 2016-12-02 10:42:46
Hi!
quoted
Anyway... since you asked. I belive I have way to disable NAPI / tx
coalescing in the driver. Unfortunately, locking is missing on the rx
path, and needs to be extended to _irqsave variant on tx path.
I have just replied to a previous thread about that...
Yeah, please reply to David's mail where he describes why it can't
work.
quoted
So patch currently looks like this (hand edited, can't be
applied, got it working few hours ago). Does it look acceptable?
I'd prefer this to go after the patch that pulls common code to single
place, so that single place needs to be patched. Plus I guess I should
add ifdefs, so that more advanced NAPI / tx coalescing code can be
reactivated when it is fixed. Trivial fixes can go on top. Does that
sound like a plan?
Hmm, what I find strange is that, just this code is running since a
long time on several platforms and Chip versions. No raise condition
have been found or lock protection problems (also proving look
mechanisms).
Well, it works better for me when I disable CONFIG_SMP. It is normal
that locking problems are hard to reproduce :-(.
Pavel, I ask you sorry if I missed some problems so, if you can
(as D. Miller asked) to send us a cover letter + all patches
I will try to reply soon. I can do also some tests if you ask
me that! I could run on 3.x and 4.x but I cannot promise you
benchmarks.
Actually... I have questions here. David normally pulls from you (can
I have a address of your git tree?).
Could you apply these to your git?
[PATCH] stmmac ethernet: unify locking
[PATCH] stmmac: simplify flag assignment
[PATCH] stmmac: cleanup documenation, make it match reality
They are rather trivial and independend, I'm not sure what cover
letter would say, besides "simple fixes".
Then I can re-do the reset on top of that...
From: Pavel Machek <hidden> Date: 2016-12-02 12:32:47
Hi!
quoted
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.
And that's why low-res timers do not cut it.
in that case, I expect that the tuning of the driver could help you.
I mean, by using ethtool, it could be enough to set the IC bit on all
the descriptors. You should touch the tx_coal_frames.
Then you can use ethtool -S to monitor the status.
Yes, I did something similar. Unfortnunately that meant crash within
minutes, at least with 4.4 kernel. (If you know what was fixed between
4.4 and 4.9, that would be helpful).
We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.
Please reply to David, and explain how it is supposed to
work... because right now it does not. 40 msec delays are not
acceptable in default configuration.
quoted
quoted
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!
Agreed that no irqlock protection is needed if we rely on napi and timers.
quoted
quoted
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!
...
quoted
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
This is not necessary.
dma_interrupt accesses shared priv->xstats; variables are of type
unsigned long (not atomic_t), yet they are accesssed from interrupt
context and from stmmac_ethtool without any locking. That can result
in broken statistics AFAICT.
Please take another look. As far as I can tell, you can have two cpus
at #1 and #2 in the code, at the same time. It looks like napi_... has
some atomic opertions inside so that looks safe at the first look. But
I'm not sure if they also include enough memory barriers to make it
safe...?
static void stmmac_dma_interrupt(struct stmmac_priv *priv)
{
...
status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
if (likely((status & handle_rx)) || (status & handle_tx)) {
if (likely(napi_schedule_prep(&priv->napi))) {
#1
stmmac_disable_dma_irq(priv);
__napi_schedule(&priv->napi);
}
}
static int stmmac_poll(struct napi_struct *napi, int budget)
{
struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
int work_done = 0;
priv->xstats.napi_poll++;
stmmac_tx_clean(priv);
work_done = stmmac_rx(priv, budget);
if (work_done < budget) {
napi_complete(napi);
#2
stmmac_enable_dma_irq(priv);
}
return work_done;
}
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 13:52:23
On 12/2/2016 1:32 PM, Pavel Machek wrote:
Hi!
quoted
quoted
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.
And that's why low-res timers do not cut it.
in that case, I expect that the tuning of the driver could help you.
I mean, by using ethtool, it could be enough to set the IC bit on all
the descriptors. You should touch the tx_coal_frames.
Then you can use ethtool -S to monitor the status.
Yes, I did something similar. Unfortnunately that meant crash within
minutes, at least with 4.4 kernel. (If you know what was fixed between
4.4 and 4.9, that would be helpful).
4.4 has no GMAC4 support.
Alex, do you remember any patches to fix that?
quoted
We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.
Please reply to David, and explain how it is supposed to
work... because right now it does not. 40 msec delays are not
acceptable in default configuration.
I mean, that on UP and SMP system this schema helped
to improve the performance saving CPU on my side and this has been
tested since a long time (~4 years).
I tested something similar to yours where unidirectional traffic
with limited throughput was needed and I can confirm you that
tuning/removing coalesce parameters this helped. The tuning I decided
to keep in the driver was suitable in several user cases and if now
you have problems or you want to review it I can just confirm that
there are no problems on my side. If you want to simply the logic
around the tx process and remove timer on official driver I can accept
that. I will just ask you uto double check if the throughput and
CPU usage when request max throughput (better if on GiGa setup) has
no regressions.
Otherwise we could start thinking about adaptive schema if feasible.
quoted
quoted
quoted
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!
Agreed that no irqlock protection is needed if we rely on napi and timers.
ok
quoted
quoted
quoted
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!
...
quoted
quoted
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
This is not necessary.
dma_interrupt accesses shared priv->xstats; variables are of type
unsigned long (not atomic_t), yet they are accesssed from interrupt
context and from stmmac_ethtool without any locking. That can result
in broken statistics AFAICT.
ok we can check this and welcome patches and I'd prefer to
remove xstats from critical part of the code like ISR (that
comes from old story of the driver).
Please take another look. As far as I can tell, you can have two cpus
at #1 and #2 in the code, at the same time. It looks like napi_... has
some atomic opertions inside so that looks safe at the first look. But
I'm not sure if they also include enough memory barriers to make it
safe...?
Although I have never reproduced related issues on SMP platforms
due to reordering of memory operations but, as said above, welcome
review on this especially if you are seeing problems when manage NAPI.
FYI, the only memory barrier you will see in the driver are about the
OWN_BIT setting till now.
static void stmmac_dma_interrupt(struct stmmac_priv *priv)
{
...
status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
if (likely((status & handle_rx)) || (status & handle_tx)) {
if (likely(napi_schedule_prep(&priv->napi))) {
#1
stmmac_disable_dma_irq(priv);
__napi_schedule(&priv->napi);
}
}
static int stmmac_poll(struct napi_struct *napi, int budget)
{
struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
int work_done = 0;
priv->xstats.napi_poll++;
stmmac_tx_clean(priv);
work_done = stmmac_rx(priv, budget);
if (work_done < budget) {
napi_complete(napi);
#2
stmmac_enable_dma_irq(priv);
}
hmm, I have to check (and refresh my memory) but the driver
uses the napi_schedule_prep.
Regards
Peppe
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
could it be that there is also another issue concerned locking?:
The tx completion handler takes the xmit_lock in case that the
netif_queue is stopped. This is AFAICS unnecessary, since both
xmit and completion handler are already synchronized by the private
tx lock. But it is IMHO also dangerous:
In the xmit handler we have the locking order
1. xmit_lock
2. private tx lock
while in the completion handler its the reverse:
1. private tx lock
2. xmit lock.
Do I miss something?
Regards,
Lino
@@ -929,6 +929,17 @@ static int stmmac_set_bfsize(int mtu, int bufsize)returnret;}+staticinlinestructdma_desc*stmmac_tx_desc(structstmmac_priv*priv,inti)+{+structdma_desc*p;+if(priv->extend_desc)+p=&((priv->dma_etx+i)->basic);+else+p=priv->dma_tx+i;+returnp;+}++/***stmmac_clear_descriptors-cleardescriptors*@priv:driverprivatestructure
Hi Pavel and Peppe,
On 12/02/2016 02:51 PM, Giuseppe CAVALLARO wrote:
On 12/2/2016 1:32 PM, Pavel Machek wrote:
quoted
Hi!
quoted
quoted
Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.
And that's why low-res timers do not cut it.
in that case, I expect that the tuning of the driver could help you.
I mean, by using ethtool, it could be enough to set the IC bit on all
the descriptors. You should touch the tx_coal_frames.
Then you can use ethtool -S to monitor the status.
Yes, I did something similar. Unfortnunately that meant crash within
minutes, at least with 4.4 kernel. (If you know what was fixed between
4.4 and 4.9, that would be helpful).
4.4 has no GMAC4 support.
Alex, do you remember any patches to fix that?
No sorry Peppe.
Pavel,
Sorry but I'm a little bit confused. I'm dropped in some mails without
historic. I see cleanup, coalescence issue and TSO question.
What is your main issue? Are you working on gmac4 or 3.x ?
Can you refresh a little bit the story please ?
Regards
Alex
quoted
quoted
We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.
Please reply to David, and explain how it is supposed to
work... because right now it does not. 40 msec delays are not
acceptable in default configuration.
I mean, that on UP and SMP system this schema helped
to improve the performance saving CPU on my side and this has been
tested since a long time (~4 years).
I tested something similar to yours where unidirectional traffic
with limited throughput was needed and I can confirm you that
tuning/removing coalesce parameters this helped. The tuning I decided
to keep in the driver was suitable in several user cases and if now
you have problems or you want to review it I can just confirm that
there are no problems on my side. If you want to simply the logic
around the tx process and remove timer on official driver I can accept
that. I will just ask you uto double check if the throughput and
CPU usage when request max throughput (better if on GiGa setup) has
no regressions.
Otherwise we could start thinking about adaptive schema if feasible.
quoted
quoted
quoted
quoted
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!
Agreed that no irqlock protection is needed if we rely on napi and
timers.
ok
quoted
quoted
quoted
quoted
Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!
...
quoted
quoted
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
This is not necessary.
dma_interrupt accesses shared priv->xstats; variables are of type
unsigned long (not atomic_t), yet they are accesssed from interrupt
context and from stmmac_ethtool without any locking. That can result
in broken statistics AFAICT.
ok we can check this and welcome patches and I'd prefer to
remove xstats from critical part of the code like ISR (that
comes from old story of the driver).
quoted
Please take another look. As far as I can tell, you can have two cpus
at #1 and #2 in the code, at the same time. It looks like napi_... has
some atomic opertions inside so that looks safe at the first look. But
I'm not sure if they also include enough memory barriers to make it
safe...?
Although I have never reproduced related issues on SMP platforms
due to reordering of memory operations but, as said above, welcome
review on this especially if you are seeing problems when manage NAPI.
FYI, the only memory barrier you will see in the driver are about the
OWN_BIT setting till now.
quoted
static void stmmac_dma_interrupt(struct stmmac_priv *priv)
{
...
status = priv->hw->dma->dma_interrupt(priv->ioaddr,
&priv->xstats);
if (likely((status & handle_rx)) || (status & handle_tx)) {
if (likely(napi_schedule_prep(&priv->napi))) {
#1
stmmac_disable_dma_irq(priv);
__napi_schedule(&priv->napi);
}
}
static int stmmac_poll(struct napi_struct *napi, int budget)
{
struct stmmac_priv *priv = container_of(napi, struct
stmmac_priv, napi);
int work_done = 0;
priv->xstats.napi_poll++;
stmmac_tx_clean(priv);
work_done = stmmac_rx(priv, budget);
if (work_done < budget) {
napi_complete(napi);
#2
stmmac_enable_dma_irq(priv);
}
hmm, I have to check (and refresh my memory) but the driver
uses the napi_schedule_prep.
Regards
Peppe
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 16:02:27
Hi Pavel
On 12/2/2016 11:42 AM, Pavel Machek wrote:
Hi!
quoted
quoted
Anyway... since you asked. I belive I have way to disable NAPI / tx
coalescing in the driver. Unfortunately, locking is missing on the rx
path, and needs to be extended to _irqsave variant on tx path.
I have just replied to a previous thread about that...
Yeah, please reply to David's mail where he describes why it can't
work.
let me to re-check the mails :-) I can try to provide you
more details about what I experimented
quoted
quoted
So patch currently looks like this (hand edited, can't be
applied, got it working few hours ago). Does it look acceptable?
I'd prefer this to go after the patch that pulls common code to single
place, so that single place needs to be patched. Plus I guess I should
add ifdefs, so that more advanced NAPI / tx coalescing code can be
reactivated when it is fixed. Trivial fixes can go on top. Does that
sound like a plan?
Hmm, what I find strange is that, just this code is running since a
long time on several platforms and Chip versions. No raise condition
have been found or lock protection problems (also proving look
mechanisms).
Well, it works better for me when I disable CONFIG_SMP. It is normal
that locking problems are hard to reproduce :-(.
can you share me the test, maybe I can try to reproduce on ARM box.
Are you using 3.x or 4.x GMAC?
quoted
Pavel, I ask you sorry if I missed some problems so, if you can
(as D. Miller asked) to send us a cover letter + all patches
I will try to reply soon. I can do also some tests if you ask
me that! I could run on 3.x and 4.x but I cannot promise you
benchmarks.
Actually... I have questions here. David normally pulls from you (can
I have a address of your git tree?).
No I send the patches to the mailing list.
Could you apply these to your git?
[PATCH] stmmac ethernet: unify locking
[PATCH] stmmac: simplify flag assignment
[PATCH] stmmac: cleanup documenation, make it match reality
They are rather trivial and independend, I'm not sure what cover
letter would say, besides "simple fixes".
Then I can re-do the reset on top of that...
From: Giuseppe CAVALLARO <hidden> Date: 2016-12-02 16:03:11
Hi Alex
On 12/2/2016 3:26 PM, Alexandre Torgue wrote:
quoted
4.4 has no GMAC4 support.
Alex, do you remember any patches to fix that?
No sorry Peppe.
Pavel,
Sorry but I'm a little bit confused. I'm dropped in some mails without
historic. I see cleanup, coalescence issue and TSO question.
What is your main issue? Are you working on gmac4 or 3.x ?
Can you refresh a little bit the story please ?
let me try to do a sum, please Pavel feel free to correct me.
There are some open points about the tx mitigation schema
that we are trying to detail and eventually tune or change
(but keeping the same performance on other user-case).
In particular, the test case that is raising problem is
an unicast tx bench.
I suggested Pavel to tune coalesce (IC bit settings) via
ethtool and monitor stats but he is getting problems (maybe
due to lock).
IIUC problems are mainly on new kernel and not on 4.4 where
the gmac4 is missing. Please Pavel, could you confirm?
Then, there are some open points about lock protections
for xstat and Pavel is getting some problem on SMP.
I do think that we need to review that. This also could
improve the code in critical parts.
Also there are some other discussion about the lock
protection on NAPI still under discussion. I have not
clear if in this case Pavel is getting strange behavior.
Regards
Peppe
From: Pavel Machek <hidden> Date: 2016-12-05 10:33:34
Hi!
quoted
quoted
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
Not NAPI poll but stmmac_tx_timer(), right?
in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!
Actually, I was wrong. irqlock protection is needed, since
stmmac_tx_clean() is called from timer, and that's interrupt context,
as you can confirm using BUG_ON(in_interrupt());
in_interrupt() can mean both softirq and hardirq context. In this case it
means softirq. So I guess you were right before, and no irq locking is needed.
Regards,
Lino
From: Pavel Machek <hidden> Date: 2016-12-05 11:45:07
Hi!
quoted
quoted
quoted
So patch currently looks like this (hand edited, can't be
applied, got it working few hours ago). Does it look acceptable?
I'd prefer this to go after the patch that pulls common code to single
place, so that single place needs to be patched. Plus I guess I should
add ifdefs, so that more advanced NAPI / tx coalescing code can be
reactivated when it is fixed. Trivial fixes can go on top. Does that
sound like a plan?
Hmm, what I find strange is that, just this code is running since a
long time on several platforms and Chip versions. No raise condition
have been found or lock protection problems (also proving look
mechanisms).
Well, it works better for me when I disable CONFIG_SMP. It is normal
that locking problems are hard to reproduce :-(.
can you share me the test, maybe I can try to reproduce on ARM box.
Are you using 3.x or 4.x GMAC?
I'm using board similar to altera socfpga. 3.70a, as far as I can
tell.
gmac0: ethernet@ff700000 {
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac\
";
quoted
quoted
Pavel, I ask you sorry if I missed some problems so, if you can
(as D. Miller asked) to send us a cover letter + all patches
I will try to reply soon. I can do also some tests if you ask
me that! I could run on 3.x and 4.x but I cannot promise you
benchmarks.
Actually... I have questions here. David normally pulls from you (can
I have a address of your git tree?).
From: Pavel Machek <hidden> Date: 2016-12-05 11:57:33
Hi!
the idea behind the TX mitigation is to mix the interrupt and
timer and this approach gave us real benefit in terms
of performances and CPU usage (especially on SH4-200/SH4-300 platforms
based).
In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI poll will be
scheduled.
But there is a timer that can run (and we experimented that no high
resolution is needed) to clear the tx resources.
I'm sorry, but it is just broken. It could have never worked. If it
appered it did, you did not test it right.
First, low-res timers have resolution down to one per second (see
David's email). It is not acceptable to delay transmits for 40msec,
and certainly not acceptable to delay them for 1000msec.
Second, the logic is wrong:
if (likely(priv->tx_coal_frames > priv->tx_count_frames))
mod_timer(&priv->txtimer,
STMMAC_COAL_TIMER(priv->tx_coal_timer));
else {
priv->tx_count_frames = 0;
priv->hw->desc->set_tx_ic(desc);
priv->xstats.tx_set_ic_bit++;
}
doing tx_clean() after set number of packets, or set time after the
first packet is transmitted would make sense. But that's not what the
code does. As long as packets are being transmitted, you move the
timer into the future.. so that finally you run out of the place, then
wait for timer (!) and only then you do the cleaning.
Third, times are wrong by order of magnitude. AFAICT cleaning should
be at around 5msec at 100mbit speeds, and at around .5msec at
gigabit. You have 40msec there. (Perhaps that is not too important if
the logic is fixed, as described above).
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
From: Pavel Machek <hidden> Date: 2016-12-05 12:02:37
Hi!
quoted
quoted
We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.
Please reply to David, and explain how it is supposed to
work... because right now it does not. 40 msec delays are not
acceptable in default configuration.
I mean, that on UP and SMP system this schema helped
to improve the performance saving CPU on my side and this has been
tested since a long time (~4 years).
I tested something similar to yours where unidirectional traffic
with limited throughput was needed and I can confirm you that
tuning/removing coalesce parameters this helped. The tuning I decided
to keep in the driver was suitable in several user cases and if now
you have problems or you want to review it I can just confirm that
there are no problems on my side. If you want to simply the logic
around the tx process and remove timer on official driver I can accept
that. I will just ask you uto double check if the throughput and
CPU usage when request max throughput (better if on GiGa setup) has
no regressions.
Otherwise we could start thinking about adaptive schema if feasible.
Ok, so you see the issue. Good.
See the other email to description how it could be fixed... the logic
is broken. How it was not discovered for 4 years is mystery to me.
quoted
Agreed that no irqlock protection is needed if we rely on napi and timers.
From: Pavel Machek <hidden> Date: 2016-12-05 12:27:42
Tx coalescing in stmmac is broken in more than one way, so disable it
for now.
First, low-res timers have resolution down to one per second. It is
not acceptable to delay transmits for 40msec, and certainly not
acceptable to delay them for 1000msec.
Second, the logic is wrong:
if (likely(priv->tx_coal_frames > priv->tx_count_frames))
mod_timer(&priv->txtimer,
STMMAC_COAL_TIMER(priv->tx_coal_timer));
...
doing tx_clean() after set number of packets, or set time after the
first packet is transmitted would make sense. But that's not what the
code does. As long as packets are being transmitted, you move the
timer into the future.. so that finally you run out of the place, then
wait for timer (!) and only then you do the cleaning.
Third, tx_cleanup is not safe to call from interrupt (tx_lock is not
irqsave), but that's exactly what coalescing code does.
Signed-off-by: Pavel Machek <redacted>
---
This is stable candidate, afaict. It is broken in 4.4, too.
From: Pavel Machek <hidden> Date: 2016-12-05 12:38:33
Hi!
quoted
Sorry but I'm a little bit confused. I'm dropped in some mails without
historic. I see cleanup, coalescence issue and TSO question.
What is your main issue? Are you working on gmac4 or 3.x ?
Can you refresh a little bit the story please ?
let me try to do a sum, please Pavel feel free to correct me.
There are some open points about the tx mitigation schema
that we are trying to detail and eventually tune or change
(but keeping the same performance on other user-case).
In particular, the test case that is raising problem is
an unicast tx bench.
I suggested Pavel to tune coalesce (IC bit settings) via
ethtool and monitor stats but he is getting problems (maybe
due to lock).
IIUC problems are mainly on new kernel and not on 4.4 where
the gmac4 is missing. Please Pavel, could you confirm?
Actually no, it is the other way around. I can get 4.9 to work with
some tuning. 4.4 likes to crash when tx coalesce is enabled with
shorter than 40 msec timeout. (It crashes with default settings, too,
but that takes too long to reproduce.)
Also there are some other discussion about the lock
protection on NAPI still under discussion. I have not
clear if in this case Pavel is getting strange behavior.
From: Pavel Machek <hidden> Date: 2016-12-05 22:10:10
Hi!
quoted
Actually, I was wrong. irqlock protection is needed, since
stmmac_tx_clean() is called from timer, and that's interrupt context,
as you can confirm using BUG_ON(in_interrupt());
in_interrupt() can mean both softirq and hardirq context. In this case it
means softirq. So I guess you were right before, and no irq locking is needed.
Hi Pavel,
On 05.12.2016 23:02, Pavel Machek wrote:
we need spin_lock_bh at minimum, as we are locking user context
against timer.
Best regards,
Pavel
I was referring to stmmac_tx_clean() which AFAICS is only called from softirq context,
(one time in the timer handler and one time in napi poll handler) so a spin_lock() should
be sufficient. I cant see how this is called from userspace. If it were, a spin_lock_bh() had
to be used, of course.
Regards,
Lino
From: Pavel Machek <hidden> Date: 2016-12-05 22:41:04
On Mon 2016-12-05 23:37:09, Lino Sanfilippo wrote:
Hi Pavel,
On 05.12.2016 23:02, Pavel Machek wrote:
quoted
we need spin_lock_bh at minimum, as we are locking user context
against timer.
Best regards,
Pavel
I was referring to stmmac_tx_clean() which AFAICS is only called from softirq context,
(one time in the timer handler and one time in napi poll handler) so a spin_lock() should
be sufficient. I cant see how this is called from userspace. If it were, a spin_lock_bh() had
to be used, of course.
On Mon 2016-12-05 23:37:09, Lino Sanfilippo wrote:
quoted
Hi Pavel,
On 05.12.2016 23:02, Pavel Machek wrote:
quoted
we need spin_lock_bh at minimum, as we are locking user context
against timer.
Best regards,
Pavel
I was referring to stmmac_tx_clean() which AFAICS is only called from softirq context,
(one time in the timer handler and one time in napi poll handler) so a spin_lock() should
be sufficient. I cant see how this is called from userspace. If it were, a spin_lock_bh() had
to be used, of course.
stmmac_tx_clean() shares lock with stmmac_tx() -- and that's process
context as far as I can tell. So... spin_lock_bh() at
minimum... right?
Pavel
You mean stmmac_xmit()? Thats also softirq AFAICT, its the TX softirq....
Regards,
Lino
You mean stmmac_xmit()? Thats also softirq AFAICT, its the TX softirq....
Regards,
Lino
Hmm. netdevices.txt says:
ndo_start_xmit:
...
Context: Process with BHs disabled or BH (timer),
will be called with interrupts disabled by netconsole.
...
If this is correct it can indeed be process context, too. However BHs are already
disabled.
From: Pavel Machek <hidden> Date: 2016-12-07 12:31:45
On Fri 2016-12-02 15:05:21, Lino Sanfilippo wrote:
Hi,
quoted
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
could it be that there is also another issue concerned locking?:
The tx completion handler takes the xmit_lock in case that the
netif_queue is stopped. This is AFAICS unnecessary, since both
xmit and completion handler are already synchronized by the private
tx lock. But it is IMHO also dangerous:
In the xmit handler we have the locking order
1. xmit_lock
2. private tx lock
while in the completion handler its the reverse:
1. private tx lock
2. xmit lock.
Do I miss something?
No, it seems you are right. Something like this?
Hmm. And can priv->tx_lock be removed, as we already rely on
netif_tx_lock?
(I copied the "lock already held" annotations from forcedeth. I hope
they are right....)
Best regards,
Pavel
commit a6f21255dfc11fcadc5062dfd0c5f3d77ca4f634
Author: Pavel [off-list ref]
Date: Wed Dec 7 13:29:15 2016 +0100
Reported-by: Lino Sanfilippo [off-list ref]
The tx completion handler takes the xmit_lock in case that the
netif_queue is stopped. This is AFAICS unnecessary, since both
xmit and completion handler are already synchronized by the private
tx lock. But it is IMHO also dangerous:
In the xmit handler we have the locking order
1. xmit_lock
2. private tx lock
while in the completion handler its the reverse:
1. private tx lock
2. xmit lock.
Signed-off-by: Pavel Machek [off-list ref]
On Fri 2016-12-02 15:05:21, Lino Sanfilippo wrote:
quoted
Hi,
quoted
There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?
could it be that there is also another issue concerned locking?:
The tx completion handler takes the xmit_lock in case that the
netif_queue is stopped. This is AFAICS unnecessary, since both
xmit and completion handler are already synchronized by the private
tx lock. But it is IMHO also dangerous:
In the xmit handler we have the locking order
1. xmit_lock
2. private tx lock
while in the completion handler its the reverse:
1. private tx lock
2. xmit lock.
Do I miss something?
No, it seems you are right. Something like this?
Hmm. And can priv->tx_lock be removed, as we already rely on
netif_tx_lock?
David wanted indeed the private lock to be removed completely. See
this thread.
https://marc.info/?l=linux-netdev&m=148072001900620&w=2
If you can wait a bit, I already have patches prepared to fix this issue in both
drivers. I want to send them as soon as I am at home (a few hours).
Regards,
Lino
From: Pavel Machek <hidden> Date: 2016-12-11 19:07:55
Hi!
David, ping? Can I get you to apply this one?
As you noticed, tx coalescing is completely broken in that driver, and
not easy to repair. This is simplest way to disable it. It can still
be re-enabled from userspace, so code can be fixed in future.
Best regards,
Pavel
quoted hunk
Tx coalescing in stmmac is broken in more than one way, so disable it
for now.
First, low-res timers have resolution down to one per second. It is
not acceptable to delay transmits for 40msec, and certainly not
acceptable to delay them for 1000msec.
Second, the logic is wrong:
if (likely(priv->tx_coal_frames > priv->tx_count_frames))
mod_timer(&priv->txtimer,
STMMAC_COAL_TIMER(priv->tx_coal_timer));
...
doing tx_clean() after set number of packets, or set time after the
first packet is transmitted would make sense. But that's not what the
code does. As long as packets are being transmitted, you move the
timer into the future.. so that finally you run out of the place, then
wait for timer (!) and only then you do the cleaning.
Third, tx_cleanup is not safe to call from interrupt (tx_lock is not
irqsave), but that's exactly what coalescing code does.
Signed-off-by: Pavel Machek <redacted>
---
This is stable candidate, afaict. It is broken in 4.4, too.
From: David Miller <davem@davemloft.net> Date: 2016-12-11 19:31:21
From: Pavel Machek <redacted>
Date: Sun, 11 Dec 2016 20:07:50 +0100
David, ping? Can I get you to apply this one?
As you noticed, tx coalescing is completely broken in that driver, and
not easy to repair. This is simplest way to disable it. It can still
be re-enabled from userspace, so code can be fixed in future.
Sorry I'm not applying this, I want you and the driver maintainer
to reach a real solution.
From: Pavel Machek <hidden> Date: 2016-12-11 19:57:53
On Sun 2016-12-11 14:31:13, David Miller wrote:
From: Pavel Machek <redacted>
Date: Sun, 11 Dec 2016 20:07:50 +0100
quoted
David, ping? Can I get you to apply this one?
As you noticed, tx coalescing is completely broken in that driver, and
not easy to repair. This is simplest way to disable it. It can still
be re-enabled from userspace, so code can be fixed in future.
Sorry I'm not applying this, I want you and the driver maintainer
to reach a real solution.
This is what you said about this driver:
# > 4.9-rc6 still has the delays. With the
# >
# > #define STMMAC_COAL_TX_TIMER 1000
# > #define STMMAC_TX_MAX_FRAMES 2
# >
# > settings, delays go away, and driver still works. (It fails fairly
# > fast in 4.4). Good news. But the question still is: what is going on
# > there?
#
# 256 packets looks way too large for being a trigger for aborting the
# TX coalescing timer.
#
# Looking more deeply into this, the driver is using non-highres timers
# to implement the TX coalescing. This simply cannot work.
#
# 1 HZ, which is the lowest granularity of non-highres timers in the
# kernel, is variable as well as already too large of a delay for
# effective TX coalescing.
#
# I seriously think that the TX coalescing support should be ripped out
# or disabled entirely until it is implemented properly in this driver.
I'm doing just that -- disabling it entirely until it is done
properly.
Unfortunately, maintainer does not think delays are huge problem. So I
need your help here.
Thanks,
Pavel
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