Re: [PATCH v4 07/47] soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32

On 15/11/2019 05.50, Timur Tabi wrote:

On Fri, Nov 8, 2019 at 7:04 AM Rasmus Villemoes
[off-list ref] wrote:

quoted

+static bool qe_general4_errata(void)
+{
+#ifdef CONFIG_PPC32
+       return pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x);
+#endif
+       return false;
+}
+
 /* Program the BRG to the given sampling rate and multiplier
  *
  * @brg: the BRG, QE_BRG1 - QE_BRG16

@@ -223,7 +231,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
        /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
           that the BRG divisor must be even if you're not using divide-by-16
           mode. */

Can you also move this comment (and fix the comment formatting so that
it's a proper function comment) to qe_general4_errata()?

I actually thought of doing that, but decided against it because the
comment not only mentions the SOCs affected, but also explains the
following math/logic. I mean, without that comment nearby, the code is

  if (qe_general4_errata())
     if (some weird condition)
        divisor++;

In contrast, I think the qe_general4_errata() is pretty self-explanatory
- is this a SOC affected by that errata (whatever that errata may be
about and what the software workaround is).

Rasmus