Re: [PATCH v2 01/25] powerpc/8xx: Save r3 all the time in DTLB miss handler

On Tue, Sep 22, 2015 at 06:50:29PM +0200, Christophe Leroy wrote:

We are spending between 40 and 160 cycles with a mean of 65 cycles in
the TLB handling routines (measured with mftbl) so make it more
simple althought it adds one instruction.

Signed-off-by: Christophe Leroy <redacted>

Does this just make it simpler or does it make it faster?  What is the
performance impact?  Is the performance impact seen with or without
CONFIG_8xx_CPU6 enabled?  Without it, it looks like you're adding an
mtspr/mfspr combo in order to replace one mfspr.

-Scott