Thread (76 messages) 76 messages, 4 authors, 2015-10-12

Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline

From: Scott Wood <hidden>
Date: 2015-09-22 20:35:20
Also in: lkml

On Tue, 2015-09-22 at 20:32 +0000, Joakim Tjernlund wrote:
On Tue, 2015-09-22 at 15:14 -0500, Scott Wood wrote:
quoted
On Tue, 2015-09-22 at 19:55 +0000, Joakim Tjernlund wrote:
quoted
On Tue, 2015-09-22 at 14:42 -0500, Scott Wood wrote:
quoted
On Tue, 2015-09-22 at 19:34 +0000, Joakim Tjernlund wrote:
quoted
On Tue, 2015-09-22 at 13:58 -0500, Scott Wood wrote:
quoted
On Tue, 2015-09-22 at 18:12 +0000, Joakim Tjernlund wrote:
quoted
On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote:
quoted
flush/clean/invalidate _dcache_range() functions are all very
similar and are quite short. They are mainly used in 
__dma_sync()
perf_event locate them in the top 3 consumming functions 
during
heavy ethernet activity

They are good candidate for inlining, as __dma_sync() does
almost nothing but calling them

Signed-off-by: Christophe Leroy <redacted>
---
New in v2

 arch/powerpc/include/asm/cacheflush.h | 55 
+++++++++++++++++++++++++++--
 arch/powerpc/kernel/misc_32.S         | 65 ------------------
----
----
----
-----
 arch/powerpc/kernel/ppc_ksyms.c       |  2 ++
 3 files changed, 54 insertions(+), 68 deletions(-)
diff --git a/arch/powerpc/include/asm/cacheflush.h 
b/arch/powerpc/include/asm/cacheflush.h
index 6229e6b..6169604 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -47,12 +47,61 @@ static inline void 
__flush_dcache_icache_phys(unsigned long physaddr)
 }
 #endif
 
-extern void flush_dcache_range(unsigned long start, unsigned 
long 
stop);
 #ifdef CONFIG_PPC32
-extern void clean_dcache_range(unsigned long start, unsigned 
long 
stop);
-extern void invalidate_dcache_range(unsigned long start, 
unsigned 
long 
stop);
+/*
+ * Write any modified data cache blocks out to memory and 
invalidate 
them.
+ * Does not invalidate the corresponding instruction cache 
blocks.
+ */
+static inline void flush_dcache_range(unsigned long start, 
unsigned 
long 
stop)
+{
+   void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
+   unsigned int size = stop - (unsigned long)addr + 
(L1_CACHE_BYTES -
1);
+   unsigned int i;
+
+   for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += 
L1_CACHE_BYTES)
+           dcbf(addr);
+   if (i)
+           mb();   /* sync */
+}
This feels optimized for the uncommon case when there is no 
invalidation.
If you mean the "if (i)", yes, that looks odd.
Yes.
quoted
quoted
I THINK it would be better to bail early 
Bail under what conditions?
test for "i = 0" and return. 
Why bother?
I usally find it better to dela with special cases upfront så the rest 
doesn't need to
bother. i=0 is a NOP and it is clearer to show that upfront.
No, I mean why bother special casing this at all?
I just said why? 
You to found the if(i) mb() a bit odd and it took a little time to see why 
it was there.
Ahh, you mean just skip the if(i) and have mb() unconditionally?
Yes.
That changes the semantics a little from the ASM version but perhaps that 
doesn't matter?
Adding more barriers than strictly necessary is a performance concern, not a 
semantic change.  How often are we really calling this function over an empty 
range?

Not that it matters much one way or another...

-Scott
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